PRIXP425ABC 885156 Intel, PRIXP425ABC 885156 Datasheet - Page 90

• Manufacturer Part Number: PRIXP425ABC 885156
• Manufacturer: Intel

Specifications of PRIXP425ABC 885156

• Lead Free Status / Rohs Status: Supplier Unconfirmed

A.11
Table 34.
A.12
Table 35.
A.13
Table 36.
Intel
Hardware Design Guidelines
90
®
IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor
JTAG Interface
GPIO Interface
GPIO Interface
JTAG Interface
System Interface
System Interface (Sheet 1 of 2)
GPIO[12:0]
GPIO[13]
GPIO[14]
GPIO[15]
†
††
†
BYPASS_CLK
SCANTESTMODE_N
RESET_IN_N
PWRON_RESET_N
HIGHZ_N
PLL_LOCK
†
JTG_TRST_N
JTG_TMS
JTG_TDO
JTG_TCK
JTG_TDI
Name
Name
Name
For a legend of the
For new designs, this signal should be pulled high with a 10-KΩ resistor when not being utilized in the
system. No change is required to existing designs that have this signal pulled low.
For a legend of the
For a legend of the
Intel
Type
Type
I/O
I/O
I/O
I/O
O
I
I
I
I
®
Type
IXP42X product line and IXC1100 control plane processors—Design Checklist
†
†
O
I
I
I
I
I
Type
Type
Type
Should be pulled high
output and written a 0 when not being utilized in the system.
Should be pulled high
output and written a 0 when not being utilized in the system.
Should be pulled high
output and written a 0 when not being utilized in the system.
Should be pulled high
output and written a 0 when not being utilized in the system.
Connect appropriately to JTAG interface.
Connect appropriately to JTAG interface.
Connect appropriately to JTAG interface.
Connect appropriately to JTAG interface.
This JTG_TRST_N signal must be asserted (driven low) during
power-up, otherwise the TAP controller may not be initialized
properly, and the processor may be locked.
Pull low using a 10-KΩ resistor.
Connect appropriately to JTAG interface.
†
Pin requires a pull-up resistor to Vccp. A 10-KΩ resistor is
recommended.
Pin requires a pull-up resistor to Vccp. A 10-KΩ resistor is
recommended.
Used as a reset input to the device after power up conditions
have been met. Power up conditions include the power
supplies reaching a safe stable condition and the PLL achieving
a locked state and the PWRON_RESET_N coming to an active
state prior to the RESET_IN_N coming to an active state.
The PWRON_RESET_N signal is a 1.3-V signal.
Do not connect to 3.3 V.
Pin requires a pull-up resistor to Vccp. A 10K-Ω resistor is
recommended.
No external logic required.
codes, see
codes, see
codes, see
Table 21 on page
Table 21 on page
Table 21 on page
††
††
††
††
Recommendation
Recommendation
using a 10-KΩ resistor or configured as an
using a 10-KΩ resistor or configured as an
using a 10-KΩ resistor or configured as an
using a 10-KΩ resistor or configured as an
Recommendation
81.
81.
81.
Document Number: 252817-008US
December 2007
Complete?
Complete?
Complete?