AD664BD-BIP Analog Devices Inc, AD664BD-BIP Datasheet - Page 15

IC DAC 12BIT QUAD MONO 28-CDIP

AD664BD-BIP

Manufacturer Part Number
AD664BD-BIP
Description
IC DAC 12BIT QUAD MONO 28-CDIP
Manufacturer
Analog Devices Inc
Datasheet

Specifications of AD664BD-BIP

Data Interface
Parallel
Rohs Status
RoHS non-compliant
Settling Time
8µs
Number Of Bits
12
Number Of Converters
4
Voltage Supply Source
Dual ±
Power Dissipation (max)
525mW
Operating Temperature
-40°C ~ 85°C
Mounting Type
Through Hole
Package / Case
28-CDIP (0.600", 15.24mm)
Resolution (bits)
12bit
Sampling Rate
125kSPS
Supply Voltage Range - Digital
4.5V To 5.5V
Supply Current
15mA
Digital Ic Case Style
DIP
No. Of Pins
28
Number Of Channels
4
Resolution
12b
Conversion Rate
125KSPS
Interface Type
Parallel
Single Supply Voltage (typ)
Not RequiredV
Dual Supply Voltage (typ)
±15V
Architecture
R-2R
Power Supply Requirement
Dual
Output Type
Voltage
Integral Nonlinearity Error
±0.75LSB
Single Supply Voltage (min)
Not RequiredV
Single Supply Voltage (max)
Not RequiredV
Dual Supply Voltage (min)
±11.4V
Dual Supply Voltage (max)
±16.5V
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Through Hole
Pin Count
28
Package Type
CDIP
Lead Free Status / Rohs Status
Not Compliant

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REV. C
IBM PC* Interface
Figure 27 illustrates a simple interface between an IBM PC and
an AD664. The three least significant address bits are used to
select the Quad and DAC. The next two address bits are used
for LS and MS. In this scheme, a 12-bit input word requires
two load cycles, an 8-bit word and a 4-bit word. Another write
*IBM PC is a trademark of International Business Machines Corp.
Figure 27. AD664 to IBM PC Interface
Figure 26. AD664 to 8051 Interface
–15–
is required to transfer the word or words previously written to
the second rank. A 12-bit-wide word again requires at least two
read cycles; one for the 8 MSBs and four for the LSBs. The
page select signal produces a CS strobe for any address from
300H to 31FH.
AD664

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