K4T1G164QE-HCF8000 Samsung Semiconductor, K4T1G164QE-HCF8000 Datasheet - Page 44

• Manufacturer Part Number: K4T1G164QE-HCF8000
• Manufacturer: Samsung Semiconductor
• Type: DDR2 SDRAMr

Specifications of K4T1G164QE-HCF8000

• Organization: 64Mx16
• Density: 1Gb
• Address Bus: 16b
• Operating Supply Voltage (typ): 1.8V
• Package Type: FBGA
• Operating Temp Range: 0C to 95C
• Operating Supply Voltage (max): 1.9V
• Operating Supply Voltage (min): 1.7V
• Pin Count: 84
• Mounting: Surface Mount
• Operating Temperature Classification: Commercial
• Lead Free Status / Rohs Status: Compliant

K4T1G084QE
K4T1G164QE
K4T1G044QE
36. These parameters are specified per their average values, however it is understood that the following relationship between the average timing and the
Example: For DDR2-667, tCH(abs),min = ( 0.48 x 3000 ps ) - 125 ps = 1315 ps
37. tHP is the minimum of the absolute half period of the actual input clock. tHP is an input parameter but not an input specification parameter. It is used
38. tQHS accounts for:
39. tQH = tHP - tQHS, where:
40. When the device is operated with input clock jitter, this parameter needs to be derated by the actual tERR(6-10per) of the input clock. (output derat-
41. When the device is operated with input clock jitter, this parameter needs to be derated by the actual tJIT(per) of the input clock. (output deratings are
42. When the device is operated with input clock jitter, this parameter needs to be derated by the actual tJIT(duty) of the input clock. (output deratings are
43. When the device is operated with input clock jitter, this parameter needs to be derated by { - tJIT(duty)max - tERR(6-10per)max } and { - tJIT(duty)min
Absolute clock Period
Absolute clock HIGH pulse width
Absolute clock LOW pulse width
2) The worst case push-out of DQS on one transition followed by the worst case pull-in of DQ on the next transition, both of which are independent of
1) If the system provides tHP of 1315 ps into a DDR2-667 SDRAM, the DRAM provides tQH of 975 ps minimum.
2) If the system provides tHP of 1420 ps into a DDR2-667 SDRAM, the DRAM provides tQH of 1080 ps minimum.
1) The pulse duration distortion of on-chip clock circuits, which represents how well the actual tHP at the input is transferred to the output; and
{The less half-pulse width distortion present, the larger the tQH value is; and the larger the valid data eye will be.}
tHP = Min ( tCH(abs), tCL(abs) ),
where,
tCH(abs) is the minimum of the actual instantaneous clock HIGH time;
tCL(abs) is the minimum of the actual instantaneous clock LOW time;
tHP is the minimum of the absolute half period of the actual input clock; and tQHS is the specification value under the max column.
Examples:
absolute instantaneous timing holds at all times. (Min and max of SPEC values are to be used for calculations in the table below.)
in conjunction with tQHS to derive the DRAM output timing tQH. The value to be used for tQH calculation is determined by the following equation;
ings are relative to the SDRAM input clock.)
min(derated) = tDQSCKmin - tERR(6-10per)max = - 400 ps - 293 ps = - 693 ps and tDQSCKmax(derated) = tDQSCKmax - tERR(6-10per)min = 400
ps + 272 ps = + 672 ps. Similarly, tLZ(DQ) for DDR2-667 derates to tLZ(DQ)min(derated) = - 900 ps - 293 ps = - 1193 ps and tLZ(DQ)max(derated) =
450 ps + 272 ps = + 722 ps.
relative to the SDRAM input clock.)
tRPREmin + tJIT(per)min = 0.9 x tCK(avg) - 72 ps = + 2178 ps and tRPREmax(derated) = tRPREmax + tJIT(per)max = 1.1 x tCK(avg) + 93 ps = +
2843 ps.
relative to the SDRAM input clock.)
tRPSTmin + tJIT(duty)min = 0.4 x tCK(avg) - 72 ps = + 928 ps and tRPSTmax(derated) = tRPSTmax + tJIT(duty)max = 0.6 x tCK(avg) + 93 ps = +
1592 ps.
- tERR(6-10per)min } of the actual input clock. (output deratings are relative to the SDRAM input clock.)
ps and tJIT(duty)max = + 94 ps, then tAOFmin(derated) = tAOFmin + { - tJIT(duty)max - tERR(6-10per)max } = - 450 ps + { - 94 ps - 293 ps} = - 837
ps and tAOFmax(derated) = tAOFmax + { - tJIT(duty)min - tERR(6-10per)min } = 1050 ps + { 106 ps + 272 ps } = + 1428 ps.
For example, if the measured jitter into a DDR2-667 SDRAM has tERR(6-10per)min = - 272 ps and tERR(6-10per)max = + 293 ps, then tDQSCK-
For example, if the measured jitter into a DDR2-667 SDRAM has tJIT(per)min = - 72 ps and tJIT(per)max = + 93 ps, then tRPREmin(derated) =
For example, if the measured jitter into a DDR2-667 SDRAM has tJIT(duty),min = - 72 ps and tJIT(duty)max = + 93 ps, then tRPSTmin(derated) =
For example, if the measured jitter into a DDR2-667 SDRAM has tERR(6-10per)min = - 272 ps, tERR(6- 10per)max = + 293 ps, tJIT(duty)min = - 106
each other, due to data pin skew, output pattern effects, and p-channel to n-channel variation of the output drivers
Parameter
tCK(abs)
tCH(abs)
tCL(abs)
Symbol
tCH(avg)min x tCK(avg)min +
tCL(avg)min x tCK(avg)min +
tCK(avg)min + tJIT(per)min
tJIT(duty)min
tJIT(duty)min
44 of 45
Min
tCH(avg)max x tCK(avg)max +
tCL(avg)max x tCK(avg)max +
tCK(avg)max + tJIT(per)max
tJIT(duty)max
tJIT(duty)max
Rev. 1.1 December 2008
Max
DDR2 SDRAM
Units
ps
ps
ps