K4H561638H-ZIB3

Manufacturer Part NumberK4H561638H-ZIB3
ManufacturerSamsung Semiconductor
K4H561638H-ZIB3 datasheets

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Specifications of K4H561638H-ZIB3

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K4H561638H
4M x 16Bit x 4 Banks Double Data Rate SDRAM
9.0 General Description
The K4H561638H is 268,435,456 bits of double data rate synchronous DRAM organized as 4x 4,194,304 words by 16bits, fabricated
with SAMSUNG′s high performance CMOS technology. Synchronous features with Data Strobe allow extremely high performance up to
333Mb/s per pin. I/O transactions are possible on both edges of DQS. Range of operating frequencies, programmable burst length and
programmable latencies allow the device to be useful for a variety of high performance memory system applications.
10.0 Absolute Maximum Rating
Parameter
Voltage on any pin relative to V
Voltage on V
& V
supply relative to V
DD
DDQ
Storage temperature
Power dissipation
Short circuit current
Note : Permanent device damage may occur if ABSOLUTE MAXIMUM RATINGS are exceeded.
Functional operation should be restricted to recommend operation condition.
Exposure to higher than recommended voltage for extended periods of time could affect device reliability.
11.0 DC Operating Conditions
Parameter
Supply voltage(for device with a nominal V
Supply voltage(for device with a nominal V
I/O Supply voltage(for device with a nominal V
I/O Supply voltage(for device with a nominal V
I/O Reference voltage
I/O Termination voltage(system)
Input logic high voltage
Input logic low voltage
Input Voltage Level, CK and CK inputs
Input Differential Voltage, CK and CK inputs
V-I Matching: Pullup to Pulldown Current Ratio
Input leakage current
Output leakage current
Output High Current(Normal strengh driver) ;V
Output High Current(Normal strengh driver) ;V
Output High Current(Half strengh driver) ;V
Output High Current(Half strengh driver) ;V
Note :
1. VREF is expected to be equal to 0.5*VDDQ of the transmitting device, and to track variations in the dc level of same. Peak-to peak noise on VREF may
not exceed +/-2% of the dc value.
2. V
is not applied directly to the device. V
TT
ations in the DC level of VREF
3. VID is the magnitude of the difference between the input level on CK and the input level on CK.
4. The ratio of the pullup current to the pulldown current is specified for the same temperature and voltage, over the entire temperature and voltage range,
for device drain to source voltages from 0.25V to 1.0V. For a given output, it represents the maximum difference between pullup and pulldown drivers
due to process variation. The full variation in the ratio of the maximum to minimum pullup and pulldown current will not exceed 1.7 for device drain to
source voltages from 0.1 to 1.0.
Symbol
V
, V
SS
IN
OUT
V
, V
SS
DD
DDQ
T
STG
P
D
I
OS
Recommended operating conditions(Voltage referenced to V
of 2.5V for DDR266/333)
DD
of 2.6V for DDR400)
DD
of 2.5V for DDR266/333)
DD
of 2.5V for DDR400)
DD
= V
+ 0.84V
OUT
TT
= V
- 0.84V
OUT
TT
= V
+ 0.45V
OUT
TT
= V
- 0.45V
OUT
TT
is a system supply for signal termination resistors, is expected to be set equal to VREF, and must track vari-
TT
Industrial
DDR SDRAM
Value
-0.5 ~ 3.6
-1.0 ~ 3.6
-55 ~ +150
1.5
50
=0V, T
SS
Symbol
Min
Max
V
2.3
2.7
DD
V
2.5
2.7
DD
V
2.3
2.7
DDQ
V
2.5
2.7
DDQ
V
0.49*VDDQ
0.51*VDDQ
REF
V
V
-0.04
V
+0.04
REF
REF
TT
V
(DC)
V
+0.15
V
+0.3
IH
REF
DDQ
V
(DC)
-0.3
V
-0.15
IL
REF
V
(DC)
-0.3
V
+0.3
IN
DDQ
V
(DC)
0.36
V
+0.6
ID
DDQ
VI(Ratio)
0.71
1.4
I
-2
2
I
I
-5
5
OZ
I
-16.8
OH
I
16.8
OL
I
-9
OH
I
9
OL
Rev. 1.3 February 2007
Unit
V
V
°C
W
mA
=-40 to 85°C)
A
Unit
Note
V
V
V
V
V
1
V
2
V
V
V
V
3
-
4
uA
uA
mA
mA
mA
mA

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