MT45W1ML16PAFA-70 WT Micron Technology Inc, MT45W1ML16PAFA-70 WT Datasheet - Page 7

• Manufacturer Part Number: MT45W1ML16PAFA-70 WT
• Manufacturer: Micron Technology Inc

Specifications of MT45W1ML16PAFA-70 WT

• Operating Temperature (max): 85C
• Mounting: Surface Mount
• Operating Temperature Classification: Commercial
• Lead Free Status / Rohs Status: Not Compliant

immediately upon setting CR[4] to “1” using this
method. However, using software access to write to the
CR alters the function of the ZZ# pin so that ZZ# LOW
no longer initiates PAR, although ZZ# continues to
enable WRITEs to the CR. This functional change per-
sists until the next time the device is powered up. (See
Figure 7.)
Deep Power-Down Operation
refresh-related activity. This mode is used when the
system does not require the storage provided by the
CellularRAM device. Any stored data will become cor-
rupted when DPD is entered. When refresh activity has
been re-enabled, the CellularRAM device will require
150µs to perform an initialization procedure before
normal operations can resume. READ and WRITE
operations are ignored during DPD operation.
the CR has been set LOW (CR[4] = 0). DPD is initiated
by bringing the ZZ# pin to the LOW state for longer
than 10µs. Returning ZZ# to HIGH will cause the
device to exit DPD and begin a 150µs initialization pro-
cess. During this 150µs period, the current consump-
tion will be higher than the specified standby levels but
considerably lower than the active current specifica-
tion.
09005aef80d481d3
AsyncCellularRAM_16_32.fm - Rev. A 2/18/04 EN
Deep power-down (DPD) operation disables all
The device can only enter DPD if the SLEEP bit in
ASYNC/PAGE CellularRAM MEMORY
7
PAR mode if the SLEEP bit in the CR has been set
HIGH (CR[4] = 1).
software access.
Driving the ZZ# pin LOW will place the device in the
The device should not be put into DPD using CR
Micron Technology, Inc., reserves the right to change products or specifications without notice.
Figure 7: Software Access PAR
2 MEG x 16, 1 MEG x 16
Functionality
NO
PAR permanently
independent of
To enable PAR,
bring ZZ# LOW
Change to ZZ#
functionality.
executed?
Power-Up
ZZ# level.
for 10µs.
Software
enabled,
LOAD
©2004 Micron Technology, Inc. All Rights Reserved.
YES
ADVANCE