K4T1G164QF-BCE6 Samsung Semiconductor, K4T1G164QF-BCE6 Datasheet - Page 42

• Manufacturer Part Number: K4T1G164QF-BCE6
• Manufacturer: Samsung Semiconductor

Specifications of K4T1G164QF-BCE6

• Lead Free Status / Rohs Status: Compliant

K4T1G044QF
K4T1G084QF
K4T1G164QF
20. Input waveform timing tDS with differential data strobe enabled MR[bit10]=0, is referenced from the input signal crossing at the V
21. Input waveform timing tDH with differential data strobe enabled MR[bit10]=0, is referenced from the differential data strobe crosspoint to the input sig-
22. Input waveform timing is referenced from the input signal crossing at the V
23. Input waveform timing is referenced from the input signal crossing at the V
device under test. See Figure 21.
device under test. See Figure 21.
differential data strobe crosspoint for a rising signal, and from the input signal crossing at the V
a falling signal applied to the device under test. DQS, DQS signals must be monotonic between V
nal crossing at the V
a rising signal applied to the device under test. DQS, DQS signals must be monotonic between V
IH
(DC) level for a falling signal and from the differential data strobe crosspoint to the input signal crossing at the V
CK
CK
DQS
DQS
Figure 20. Differential input waveform timing - tDS and tDH
Figure 21. Differential input waveform timing - tIS and tIH
tIS
tDS
datasheet
tDH
tIH
- 42 -
IL
IH
tDS
(DC) level for a rising signal and V
(AC) level for a rising signal and V
tIS
tDH
tIH
IL
(AC) level to the differential data strobe crosspoint for
IL
IL
(DC)max and V
(DC)max and V
V
V
V
V
V
V
V
DDQ
IH
IH
REF
IL
IL
SS
(DC)max
(AC)max
V
V
V
V
V
V
V
(AC)min
(DC)min
DDQ
IH
IH
REF
IL
IL
SS
(DC)
IH
IL
(DC)max
(AC)max
(AC)min
(DC)min
(AC) for a falling signal applied to the
(DC) for a falling signal applied to the
(DC)
IH
IH
(DC)min. See Figure 20.
(DC)min. See Figure 20.
DDR2 SDRAM
IH
(AC) level to the
IL
(DC) level for
Rev. 1.11