MT29F8G08ABABAWP-IT:B Micron Technology Inc, MT29F8G08ABABAWP-IT:B Datasheet - Page 13

• Manufacturer Part Number: MT29F8G08ABABAWP-IT:B
• Description: MICMT29F8G08ABABAWP-IT:B 8GB ASYNCHRONOU
• Manufacturer: Micron Technology Inc

Specifications of MT29F8G08ABABAWP-IT:B

• Cell Type: NAND
• Density: 8Gb
• Interface Type: Parallel
• Boot Type: Not Required
• Address Bus: 30b
• Operating Supply Voltage (typ): 3.3V
• Operating Temp Range: -40C to 85C
• Package Type: TSOP
• Program/erase Volt (typ): 2.7 to 3.6V
• Sync/async: Asynchronous
• Operating Temperature Classification: Industrial
• Operating Supply Voltage (min): 2.7V
• Operating Supply Voltage (max): 3.6V
• Word Size: 8b
• Number Of Words: 1G
• Mounting: Surface Mount
• Pin Count: 48
• Lead Free Status / Rohs Status: Compliant

Architecture
Figure 5:
PDF: 09005aef8386131b / Source: 09005aef838cad98
m61a_async_sync_nand.fm - Rev. A 2/09 EN
I/O[7:0] (DQ[7:0])
RE# (W/R#)
WE# (CLK)
N/A (DQS)
NAND Flash LUN Functional Block Diagram
WP#
R/B#
CE#
ALE
CLE
Notes:
2. Signal names in parentheses are the signal names when the synchronous interface is active.
These devices use NAND Flash electrical and command interfaces. Data, commands,
and addresses are multiplexed onto the same pins and received by I/O control circuits.
The commands received at the I/O control circuits are latched by a command register
and are transferred to control logic circuits for generating internal signals to control
device operations. The addresses are latched by an address register and sent to a row
decoder to select a row address, or to a column decoder to select a column address.
Data is transferred to or from the NAND Flash memory array, byte-by-byte, through a
data register and a cache register. See Figure 5 for details.
The NAND Flash memory array is programmed and read using page-based operations
and is erased using block-based operations. During normal page operations, the data
and cache registers act as a single register. During cache operations, the data and cache
registers operate independently to increase data throughput.
The status register reports the status of LUN operations.
1. N/A: This signal is tri-stated when the asynchronous interface is active.
Control
Control
Logic
I/O
Micron Confidential and Proprietary
Command Register
Address Register
Status Register
8Gb Asychronous/Synchronous NAND Flash Memory
13
Micron Technology, Inc., reserves the right to change products or specifications without notice.
V
CC
Column Decode
Array (2 planes)
Column Decode
Cache Register
Data Register
Cache Register
Data Register
NAND Flash
NAND Flash
©2008 Micron Technology, Inc. All rights reserved.
V
Array
SS
V
CCQ
Architecture
V
SSQ
Advance