MT29F8G08ABABAWP-IT:B Micron Technology Inc, MT29F8G08ABABAWP-IT:B Datasheet - Page 15

• Manufacturer Part Number: MT29F8G08ABABAWP-IT:B
• Description: MICMT29F8G08ABABAWP-IT:B 8GB ASYNCHRONOU
• Manufacturer: Micron Technology Inc

Specifications of MT29F8G08ABABAWP-IT:B

• Cell Type: NAND
• Density: 8Gb
• Interface Type: Parallel
• Boot Type: Not Required
• Address Bus: 30b
• Operating Supply Voltage (typ): 3.3V
• Operating Temp Range: -40C to 85C
• Package Type: TSOP
• Program/erase Volt (typ): 2.7 to 3.6V
• Sync/async: Asynchronous
• Operating Temperature Classification: Industrial
• Operating Supply Voltage (min): 2.7V
• Operating Supply Voltage (max): 3.6V
• Word Size: 8b
• Number Of Words: 1G
• Mounting: Surface Mount
• Pin Count: 48
• Lead Free Status / Rohs Status: Compliant

Figure 8:
Table 2:
PDF: 09005aef8386131b / Source: 09005aef838cad98
m61a_async_sync_nand.fm - Rev. A 2/09 EN
1,024 blocks per plane
2,048 blocks per LUN
Array Addressing for 8Gb Logical Unit (LUN)
Array Organization for 8Gb Logical Unit (LUN)
Cache Registers
Data Registers
Notes:
1. CAx = column address, PAx = page address, BAx = block address, LAx = LUN address; the
2. When using the synchronous interface, CA0 is forced to 0 internally; one data cycle always
3. Column addresses 4,320 (10E0h) through 8,191 (1FFFh) are invalid, "out of bounds," do not
4. BA[8] is the plane-select bit:
Cycle
First
Second
Third
Fourth
Fifth
page address, block address, and LUN address are collectively called the row address.
returns one even byte and one odd byte.
exist in the device, and cannot by addressed.
Plane 0: BA[7] = "0"
Plane 1: BA[7] = "1"
(0, 2, 4, ..., 2,046)
1 Block
4,096
4,096
Plane 0
(DQ7)
BA15
LOW
BA7
LOW
I/O7
CA7
Micron Confidential and Proprietary
4,320 bytes
4
Logical Unit (LUN)
224
224
8Gb Asychronous/Synchronous NAND Flash Memory
(DQ6)
BA14
LOW
LOW
I/O6
CA6
PA6
(1, 3, 5, ..., 2,047)
1 Block
4,096
4,096
Plane 1
15
4,320 bytes
(DQ5)
BA13
LOW
LOW
I/O5
CA5
PA5
224
224
Micron Technology, Inc., reserves the right to change products or specifications without notice.
(DQ4)
CA12
BA12
LOW
I/O4
CA4
PA4
3
1 page = (4K + 224 bytes)
1 block = (4K + 224) bytes x 128 pages
1 plane = (512K + 28K) bytes x 1,024 blocks
1 LUN = 4,320Mb x 2 planes
Device and Array Organization
DQ0
(DQ3)
CA11
BA11
LOW
I/O3
CA3
PA3
DQ7
= (512K + 28K) bytes
= 4,320Mb
= 8,640Mb
(DQ2)
CA10
BA10
LOW
I/O2
CA2
PA2
©2008 Micron Technology, Inc. All rights reserved.
1 Block
(DQ1)
BA17
I/O1
CA1
CA9
BA9
PA1
Advance
(DQ0)
BA16
CA0
I/O0
CA8
PA0
BA8
2