MT29F8G08ABABAWP-IT:B Micron Technology Inc, MT29F8G08ABABAWP-IT:B Datasheet - Page 43

• Manufacturer Part Number: MT29F8G08ABABAWP-IT:B
• Description: MICMT29F8G08ABABAWP-IT:B 8GB ASYNCHRONOU
• Manufacturer: Micron Technology Inc

Specifications of MT29F8G08ABABAWP-IT:B

• Cell Type: NAND
• Density: 8Gb
• Interface Type: Parallel
• Boot Type: Not Required
• Address Bus: 30b
• Operating Supply Voltage (typ): 3.3V
• Operating Temp Range: -40C to 85C
• Package Type: TSOP
• Program/erase Volt (typ): 2.7 to 3.6V
• Sync/async: Asynchronous
• Operating Temperature Classification: Industrial
• Operating Supply Voltage (min): 2.7V
• Operating Supply Voltage (max): 3.6V
• Word Size: 8b
• Number Of Words: 1G
• Mounting: Surface Mount
• Pin Count: 48
• Lead Free Status / Rohs Status: Compliant

Identification Operations
READ ID (90h)
Figure 30:
Figure 31:
Table 6:
PDF: 09005aef8386131b / Source: 09005aef838cad98
m61a_async_sync_nand.fm - Rev. A 2/09 EN
Byte 0 − Manufacturer ID
Manufacturer Micron
Byte 1 − Device ID
Vcc
READ ID Parameters for Address 00h
READ ID (90h) with 00h Address Cycle Operation
READ ID (90h) with 20h Address Cycle Operation
Options
3.3V
Notes:
Notes:
1. See Table 6 on page 43 for byte definitions.
1. See Table 7 on page 44 for byte definitions.
The READ ID (90h) command is used to read identifier codes programmed into the
target. This command is accepted by the target only when all LUNs on the target are idle.
Writing 90h to the command register puts the target in read ID mode. The target stays in
this mode until another valid command is issued.
When the 90h command is followed by an 00h address cycle, the target returns a 5-byte
identifier code that includes the manufacturer's ID, device configuration, and part-
specific information.
When the 90h command is followed by a 20h address cycle, the target returns the 4-byte
ONFI identifier code.
After the 90h and address cycle are written to the target, the host enables data output
mode to read the identifier information. When the asynchronous interface is active, one
data byte is output per RE# toggle. When the synchronous interface is active, one data
byte is output per rising edge of DQS when ALE and CLE are HIGH; the data byte on the
falling edge of DQS is identical to the data byte output on the previous rising edge of
DQS.
I/O[7:0] (DQ[7:0])
I/O[7:0] (DQ[7:0])
Cycle type
Cycle type
(DQ7)
I/O7
0
Micron Confidential and Proprietary
Command
Command
(DQ6)
I/O6
8Gb Asychronous/Synchronous NAND Flash Memory
90h
90h
0
(DQ5)
Address
Address
I/O5
00h
1
20h
43
(DQ4)
I/O4
t WHR
t WHR
0
Micron Technology, Inc., reserves the right to change products or specifications without notice.
(DQ3)
Byte 0
I/O3
D
D
4Fh
1
1
OUT
OUT
(DQ2)
I/O2
Byte 1
D
D
4Eh
1
0
OUT
OUT
(DQ1)
I/O1
Byte 2
Command Definitions
D
D
0
0
46h
OUT
OUT
©2008 Micron Technology, Inc. All rights reserved.
(DQ0) Value Notes
I/O0
Byte 3
D
0
0
D
49h
OUT
OUT
2Ch
Byte 4
D
OUT
Advance
1