MT29F8G08ABABAWP-IT:B Micron Technology Inc, MT29F8G08ABABAWP-IT:B Datasheet - Page 62

• Manufacturer Part Number: MT29F8G08ABABAWP-IT:B
• Description: MICMT29F8G08ABABAWP-IT:B 8GB ASYNCHRONOU
• Manufacturer: Micron Technology Inc

Specifications of MT29F8G08ABABAWP-IT:B

• Cell Type: NAND
• Density: 8Gb
• Interface Type: Parallel
• Boot Type: Not Required
• Address Bus: 30b
• Operating Supply Voltage (typ): 3.3V
• Operating Temp Range: -40C to 85C
• Package Type: TSOP
• Program/erase Volt (typ): 2.7 to 3.6V
• Sync/async: Asynchronous
• Operating Temperature Classification: Industrial
• Operating Supply Voltage (min): 2.7V
• Operating Supply Voltage (max): 3.6V
• Word Size: 8b
• Number Of Words: 1G
• Mounting: Surface Mount
• Pin Count: 48
• Lead Free Status / Rohs Status: Compliant

READ Operations
PDF: 09005aef8386131b / Source: 09005aef838cad98
m61a_async_sync_nand.fm - Rev. A 2/09 EN
data. The host can re-enable data output by issuing the 11h command, waiting
and then issuing the CHANGE READ COLUMN (05h-E0h) or CHANGE READ COLUMN
ENHANCED (06h-E0h) command. It is possible toggle between data output and data
input multiple times. After the final CHANGE ROW ADDRESS (85h) operation is
complete, issue the 10h command to program the cache register to the NAND Flash
array.
In devices that have more than one LUN per target, the CHANGE ROW ADDRESS (85h)
command can be used with other commands that support multi-LUN operations.
READ operations are used to copy data from the NAND Flash array of one or more of the
planes to their respective cache registers, and to enable data output from the cache
registers to the host through the DQ bus.
READ Operations
The READ PAGE (00h-30h) command, when issued by itself, reads one page from the
NAND Flash array to its cache register and enables data output for that cache register.
During data output the following commands can be used to read and modify the data in
the cache registers: CHANGE READ COLUMN (05h-E0h), CHANGE ROW ADDRESS
(85h).
READ MULTI-PLANE Operations
READ MULTI-PLANE PAGE operations improve data throughput by copying data from
multiple planes to the specified cache registers simultaneously. This is done by
prepending one or more READ PAGE MULTI-PLANE (00h-32h) commands in front of
the READ PAGE (00h-30h) command.
When the LUN is ready, the SELECT CACHE REGISTER (06h-E0h) command determines
which plane outputs data. During data output the following commands can be used to
read and modify the data in the cache registers: CHANGE READ COLUMN (05h-E0h),
CHANGE ROW ADDRESS (85h).
See “Multi-Plane Operations” on page 86 for details.
READ PAGE CACHE Operations
For the highest sustainable level of data throughput, the READ PAGE CACHE-series (31h,
00h-31h) commands can be used to output data from the cache register while concur-
rently copying a page from the NAND Flash array to the data register.
A READ PAGE CACHE command sequence is started when the READ PAGE (00h-30h)
command is used to read a page from the NAND Flash array to its corresponding cache
register. R/B# goes LOW during
After
issued:
• READ PAGE CACHE SEQUENTIAL (31h)—starts copying the next sequential page
• READ PAGE CACHE RANDOM (00h-31h)—starts copying the page specified in this
After the READ PAGE CACHE-series (31h, 00h-31h) command has been issued, R/B#
goes LOW on the target, RDY = 0 and ARDY = 0 on the LUN for
begins copying data from the array to the data register. After
and the LUN’s status register bits indicate the device is busy with a cache operation (RDY
from the NAND Flash array to the data register.
command from the NAND Flash array (any plane) to its corresponding data register.
t
R (R/B# is HIGH and RDY = 1, ARDY = 1), either of the following commands can be
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8Gb Asychronous/Synchronous NAND Flash Memory
62
t
R and the selected LUN is busy (RDY = 0, ARDY = 0).
Micron Technology, Inc., reserves the right to change products or specifications without notice.
Command Definitions
t
RCBSY, R/B# goes HIGH
t
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RCBSY, and the next page
t
DBSY,
Advance