MT29F8G08ABABAWP-IT:B Micron Technology Inc, MT29F8G08ABABAWP-IT:B Datasheet - Page 66

• Manufacturer Part Number: MT29F8G08ABABAWP-IT:B
• Description: MICMT29F8G08ABABAWP-IT:B 8GB ASYNCHRONOU
• Manufacturer: Micron Technology Inc

Specifications of MT29F8G08ABABAWP-IT:B

• Cell Type: NAND
• Density: 8Gb
• Interface Type: Parallel
• Boot Type: Not Required
• Address Bus: 30b
• Operating Supply Voltage (typ): 3.3V
• Operating Temp Range: -40C to 85C
• Package Type: TSOP
• Program/erase Volt (typ): 2.7 to 3.6V
• Sync/async: Asynchronous
• Operating Temperature Classification: Industrial
• Operating Supply Voltage (min): 2.7V
• Operating Supply Voltage (max): 3.6V
• Word Size: 8b
• Number Of Words: 1G
• Mounting: Surface Mount
• Pin Count: 48
• Lead Free Status / Rohs Status: Compliant

READ PAGE CACHE RANDOM (00h–31h)
Figure 43:
PDF: 09005aef8386131b / Source: 09005aef838cad98
m61a_async_sync_nand.fm - Rev. A 2/09 EN
I/O[7:0] (DQ[7:0])
Cycle type
Cycle type
DQ[7:0]
RDY
RDY
READ PAGE CACHE RANDOM (00h–31h) Operation
Command
D
00h
Dn
OUT
Page Address M
1
Command
Address x5
00h
1. 00h is written to the command register.
2. Five address cycles are written to the address register.
3. 31h is written to the command register.
1. R/B# goes LOW and the LUN is busy (RDY = 0, ARDY = 0) for
2. R/B# goes HIGH and the LUN is busy with a cache operation (RDY = 1, ARDY = 0),
3. Data can be output from the cache register beginning at column address 0. The
1. The SELECT LUN WITH STATUS (78h) command is issued.
2. The READ MODE (00h) command is issued.
The READ PAGE CACHE RANDOM (00h-31h) command reads the specified block and
page into the data register while the previous page is output from the cache register. This
command is accepted by the LUN when it is ready (RDY = 1, ARDY = 1). It is also
accepted by the LUN during READ PAGE CACHE (31h, 00h-31h) operations (RDY = 1,
ARDY = 0).
This command is issued in the following sequence:
The LUN address must match the same LUN address as the previous READ PAGE (00h-
31h) command or, if applicable, the previous READ PAGE CACHE RANDOM (00h-31h)
command. There is no restriction on the plane address.
After this command is issued, the following sequence occurs:
In devices that have more than one LUN per target, during and following multi-LUN
operations, this sequence is followed to select only one LUN and prevent bus conten-
tion:
indicating that the cache register is available and that the specified page is copying
from the NAND Flash array to the data register.
CHANGE READ COLUMN (05h-E0h) command can be used to change the column
address of the data being output from the cache register.
Page Address P
Command
Address x5
30h
t WB
Micron Confidential and Proprietary
Command
t R
31h
t WB
RR
8Gb Asychronous/Synchronous NAND Flash Memory
Command
t RCBSY
00h
Page Address N
t RR
66
Address x5
D
Page N
D0
OUT
Micron Technology, Inc., reserves the right to change products or specifications without notice.
Command
31h
t WB
t RCBSY
t RR
D
Command Definitions
D0
OUT
©2008 Micron Technology, Inc. All rights reserved.
t
RCBSY.
Page M
D
…
OUT
D
Dn
OUT
1
Command
Advance
00h