MT29F8G08ABABAWP-IT:B Micron Technology Inc, MT29F8G08ABABAWP-IT:B Datasheet - Page 68

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MT29F8G08ABABAWP-IT:B

Manufacturer Part Number
MT29F8G08ABABAWP-IT:B
Description
MICMT29F8G08ABABAWP-IT:B 8GB ASYNCHRONOU
Manufacturer
Micron Technology Inc
Datasheet

Specifications of MT29F8G08ABABAWP-IT:B

Cell Type
NAND
Density
8Gb
Interface Type
Parallel
Boot Type
Not Required
Address Bus
30b
Operating Supply Voltage (typ)
3.3V
Operating Temp Range
-40C to 85C
Package Type
TSOP
Program/erase Volt (typ)
2.7 to 3.6V
Sync/async
Asynchronous
Operating Temperature Classification
Industrial
Operating Supply Voltage (min)
2.7V
Operating Supply Voltage (max)
3.6V
Word Size
8b
Number Of Words
1G
Mounting
Surface Mount
Pin Count
48
Lead Free Status / Rohs Status
Compliant

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PDF: 09005aef8386131b / Source: 09005aef838cad98
m61a_async_sync_nand.fm - Rev. A 2/09 EN
Note:
Note:
Note:
2. R/B# goes HIGH and the LUN is ready (RDY = 1, ARDY = 1).
3. The LUN and block are queued for data transfer from the array to the cache register
4. The READ PAGE (00h-30h) command is issued.
5. Data is transferred from the NAND Flash array for all of the addressed planes to their
6. When the LUN is ready (RDY = 1, ARDY = 1), data output is enabled for the cache reg-
7. When the host requests data output, it begins at the column address specified in the
8. The READ PAGE CACHE SEQUNTIAL (31h) is issued.
9. R/B# goes LOW and the LUN is busy (RDY = 0, ARDY = 0) for
After the first sequence of READ PAGE MULTI-PLANE (00h-32h) and READ PAGE (00h-
30h) has been issued to the NAND device addition cache read commands can be issued
to the NAND device. To begin cache read operations to other blocks before outputting
data from the previous read operations, there are two options.
The first option is to begin issuing the READ PAGE CACHE SEQUENTIAL (31h)
command. Issuing the READ PAGE CACHE SEQUENTIAL (31h) command will cause the
next consecutive page within each block for each plane that was addressed in steps 1 - 7
to be read. In the case issuing the READ PAGE CACHE SEQUENTIAL (31h) after the last
page in a block has already been addressed, the first page in the next sequential block in
that plane will be the next page read.
The following shows this sequence:
After R/B# goes HIGH and the LUN reports in the status register RDY = 1 and ARDY = 0,
that signals that the internal array read is ongoing and the cache register is ready to
output data from the previous read operation. When a READ PAGE CACHE SEQUEN-
TIAL (31h) command is issued the column address defaults to 0.
Steps 8 and 9 can be repeated to continue reading consecutive pages. After issuing the
last page address to be read, issue the READ PAGE CACHE LAST (3Fh) to finish the cache
reading operation.
After R/B# goes HIGH and the LUN reports in the status register RDY = 1 and ARDY = 0,
that signals that the internal array read is ongoing and the cache register is ready to
output data from the previous read operation. The SELECT CACHE REGISTER (06h-E0h)
command is required prior to outputting data. After the SELECT CACHE REGISTER
(06h-E0h) command is issued, the CHANGE READ COLUMN (05h-E0h) command can
also be issued.
During
are status operations (70h, 78h) and reset commands (FFh, FCh). Following
continue the multi-plane read operation, the only valid commands are status opera-
tions (70h, 78h), READ PAGE MULTI-PLANE (00h-32h), and READ PAGE (00h-30h).
for the addressed plane.
Additional READ PAGE MULTI-PLANE (00h-32h) commands can be issued to queue
additional planes for data transfer.
respective cache registers.
ister linked to the even plane.
READ PAGE (00h-30h) command.
To enable data output in the other cache registers, the SELECT CACHE REGISTER
(06h-E0h) command can be issued. Also, to change the column address within the
currently selected plane, the CHANGE READ COLUMN (05h-E0h) command can be
issued.
t
DBSY, the only valid commands during READ PAGE MULTI-PLANE (00h-32h)
Micron Confidential and Proprietary
8Gb Asychronous/Synchronous NAND Flash Memory
68
Micron Technology, Inc., reserves the right to change products or specifications without notice.
Command Definitions
©2008 Micron Technology, Inc. All rights reserved.
t
RCBSY
t
DBSY, to
Advance

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