MT29F8G08ABABAWP-IT:B Micron Technology Inc, MT29F8G08ABABAWP-IT:B Datasheet - Page 8

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MT29F8G08ABABAWP-IT:B

Manufacturer Part Number
MT29F8G08ABABAWP-IT:B
Description
MICMT29F8G08ABABAWP-IT:B 8GB ASYNCHRONOU
Manufacturer
Micron Technology Inc
Datasheet

Specifications of MT29F8G08ABABAWP-IT:B

Cell Type
NAND
Density
8Gb
Interface Type
Parallel
Boot Type
Not Required
Address Bus
30b
Operating Supply Voltage (typ)
3.3V
Operating Temp Range
-40C to 85C
Package Type
TSOP
Program/erase Volt (typ)
2.7 to 3.6V
Sync/async
Asynchronous
Operating Temperature Classification
Industrial
Operating Supply Voltage (min)
2.7V
Operating Supply Voltage (max)
3.6V
Word Size
8b
Number Of Words
1G
Mounting
Surface Mount
Pin Count
48
Lead Free Status / Rohs Status
Compliant

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General Description
PDF: 09005aef8386131b / Source: 09005aef838cad98
m61a_async_sync_nand.fm - Rev. A 2/09 EN
Micron NAND Flash technology provides high-performance NAND Flash memory with
an interface that supports up to 166 MT/s data read and write throughput.
Micron NAND Flash devices include two data interfaces—a synchronous interface for
high-performance I/O operations, and an asynchronous interface for legacy NAND
Flash applications. These devices use a highly multiplexed 8-bit bus (I/O[7:0], DQ[7:0])
to transfer commands, addresses, and data. Data transfers in the synchronous interface
include a bidirectional data strobe (DQS). Between the synchronous and asynchronous
interfaces there are five control signals used to implement the NAND Flash protocol. In
the synchronous interface these signals are CE#, CLE, ALE, CLK, and W/R#; in the asyn-
chronous interface these signals are CE#, CLE, ALE, WE#, and RE#. Additional signals
control hardware write protection (WP#) and monitor device status (R/B#).
This hardware interface creates a low pin-count device with a standard pinout that
remains the same from one density to another, enabling future upgrades to higher
densities with no board redesign.
A logical unit (LUN), or die, is the minimum unit that can independently execute
commands and report status. There is at least one LUN per CE#. Each LUN contains 2
planes. Each plane consists of 1,024 blocks. Each block is subdivided into 128 program-
mable pages.
The contents of each page can be programmed in
erased in
priate error correction code (ECC).
These NAND devices are ONFI 2.0-compliant. The ONFI 2.0 specification can be found
at www.onfi.org.
t
BERS. PROGRAM/ERASE endurance is specified at 100,000 when using appro-
Micron Confidential and Proprietary
8Gb Asychronous/Synchronous NAND Flash Memory
8
Micron Technology, Inc., reserves the right to change products or specifications without notice.
t
PROG, and an entire block can be
General Description
©2008 Micron Technology, Inc. All rights reserved.
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