MT29F8G08ABABAWP-IT:B Micron Technology Inc, MT29F8G08ABABAWP-IT:B Datasheet - Page 88

• Manufacturer Part Number: MT29F8G08ABABAWP-IT:B
• Description: MICMT29F8G08ABABAWP-IT:B 8GB ASYNCHRONOU
• Manufacturer: Micron Technology Inc

Specifications of MT29F8G08ABABAWP-IT:B

• Cell Type: NAND
• Density: 8Gb
• Interface Type: Parallel
• Boot Type: Not Required
• Address Bus: 30b
• Operating Supply Voltage (typ): 3.3V
• Operating Temp Range: -40C to 85C
• Package Type: TSOP
• Program/erase Volt (typ): 2.7 to 3.6V
• Sync/async: Asynchronous
• Operating Temperature Classification: Industrial
• Operating Supply Voltage (min): 2.7V
• Operating Supply Voltage (max): 3.6V
• Word Size: 8b
• Number Of Words: 1G
• Mounting: Surface Mount
• Pin Count: 48
• Lead Free Status / Rohs Status: Compliant

Error Management
Table 15:
PDF: 09005aef8386131b / Source: 09005aef838cad98
m61a_async_sync_nand.fm - Rev. A 2/09 EN
Error Management Details
Each NAND Flash LUN is specified to have a minimum number of valid blocks (NVB) of
the total available blocks. This means the LUNs could have blocks that are invalid when
shipped from the factory. An invalid block is one that contains at least one page that has
more bad bits than can be corrected by the minimum required ECC. Additional blocks
can develop with use. However, the total number of available blocks per LUN will not fall
below NVB during the endurance life of the product.
Although NAND Flash memory devices could contain bad blocks, they can be used quite
reliably in systems that provide bad-block management and error-correction algo-
rithms. This type of software environment ensures data integrity.
Internal circuitry isolates each block from other blocks, so the presence of a bad block
does not affect the operation of the rest of the NAND Flash array.
NAND Flash devices are shipped from the factory erased. The factory identifies invalid
blocks before shipping by attempting to program the bad-block mark into every location
in the first page of each invalid block. It may not be possible to program every location
with the bad-block mark. However, the first spare area location in each bad block is
guaranteed to contain the bad-block mark. This method is compliant with ONFI Factory
Defect Mapping requirements. See Table 15 for the first spare area location and the bad-
block mark.
System software should check the first spare area location on the first page of each block
prior to performing any PROGRAM or ERASE operations on the NAND Flash device. A
bad block table can then be created, enabling system software to map around these
areas. Factory testing is performed under worst-case conditions. Because invalid blocks
could be marginal, it may not be possible to recover this information if the block is
erased.
Over time, some memory locations may fail to program or erase properly. In order to
ensure that data is stored properly over the life of the NAND Flash device, the following
precautions are required:
• Always check status after a PROGRAM or ERASE operation.
• Under typical conditions, use the minimum required ECC shown in Table 15.
• Use bad-block management and wear-leveling algorithms.
Description
Minimum number of valid blocks (NVB) per LUN
Total available blocks per LUN
First spare area location
Bad-block mark
Minimum required ECC
Micron Confidential and Proprietary
8Gb Asychronous/Synchronous NAND Flash Memory
88
Micron Technology, Inc., reserves the right to change products or specifications without notice.
2,008
2,048
Byte 4,096
00h
4-bit ECC per 540 bytes of data
Requirement
©2008 Micron Technology, Inc. All rights reserved.
Error Management
Advance