CD4541BCM_NL Fairchild Semiconductor, CD4541BCM_NL Datasheet

CD4541BCM_NL

Manufacturer Part Number
CD4541BCM_NL
Description
Manufacturer
Fairchild Semiconductor
Type
Programmabler
Datasheet

Specifications of CD4541BCM_NL

# Internal Timers
1
Quiescent Current
20uA
Power Dissipation
500mW
Propagation Delay Time
8000ns
Operating Supply Voltage (min)
3V
Operating Supply Voltage (typ)
3.3/5/9/12V
Operating Supply Voltage (max)
15V
Package Type
SOIC N
High Level Output Current
-16.3mA
Low Level Output Current
19.3mA
Pin Count
14
Operating Temp Range
-55C to 125C
Operating Temperature Classification
Military
Mounting
Surface Mount
Lead Free Status / Rohs Status
Compliant
© 2002 Fairchild Semiconductor Corporation
CD4541BCM
CD4541BCN
CD4541BC
Programmable Timer
General Description
The CD4541BC Programmable Timer is designed with a
16-stage binary counter, an integrated oscillator for use
with an external capacitor and two resistors, output control
logic, and a special power-on reset circuit. The special fea-
tures of the power-on reset circuit are first, no additional
static power consumption and second, the part functions
across the full voltage range (3V–15V) whether power-on
reset is enabled or disabled.
Timing and the counter are initialized by turning on power,
if the power-on reset is enabled. When the power is
already on, an external reset pulse will also initialize the
timing and counter. After either reset is accomplished, the
oscillator frequency is determined by the external RC net-
work. The 16-stage counter divides the oscillator frequency
by any of 4 digitally controlled division ratios.
Ordering Code:
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Connection Diagram
N.C.—Not connected
Order Number
Package Number
M14A
N14A
14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow
14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide
DS006001
Top View
Features
Available division ratios 2
Increments on positive edge clock transitions
Built-in low power RC oscillator ( 2% accuracy over
temperature range and 10% supply and 3% over pro-
cessing @
Oscillator frequency range
Oscillator may be bypassed if external clock is available
(apply external clock to pin 3)
Automatic reset initializes all counters when power turns
on
External master reset totally independent of automatic
reset operation
Operates at 2
timer
Q/Q select provides output logic level flexibility
Reset (auto or master) disables oscillator during reset-
ting to provide no active power dissipation
Clock conditioning circuit permits operation with very
slow clock rise and fall times
Wide supply voltage range—3.0V to 15V
High noise immunity—0.45 V
5V–10V–15V parameter ratings
Symmetrical output characteristics
Maximum input leakage 1 A at 15V over full tempera-
ture range
High output drive (pin 8) min. one TTL load
Package Description
10 kHz)
n
frequency divider or single transition
8
, 2
October 1987
Revised May 2002
10
DC to 100 kHz
DD
, 2
(typ.)
13
, or 2
www.fairchildsemi.com
16

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CD4541BCM_NL Summary of contents

Page 1

... Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code. Connection Diagram N.C.—Not connected © 2002 Fairchild Semiconductor Corporation Features Available division ratios 2 Increments on positive edge clock transitions ...

Page 2

Truth Table Pin State 0 5 Auto Reset Operating Auto Reset Disabled 6 Timer Operational Master Reset On 9 Output Initially Low Output Initially High after Reset after Reset 10 Single Cycle Mode Recycle Mode Operating Characteristics With Auto Reset ...

Page 3

Operating Characteristics Oscillator Circuit Using RC Configuration Logic Diagram V Pin Pin 7 SS (Continued) 3 www.fairchildsemi.com ...

Page 4

Absolute Maximum Ratings (Note 2) Supply Voltage ( Input Voltage ( Storage Temperature Range ( Power Dissipation ( Dual-In-Line Small Outline Lead Temperature ( (soldering, 10 seconds) ...

Page 5

AC Electrical Characteristics (refer to test circuits Symbol Parameter t Output Rise Time TLH t Output Fall Time THL t t Turn-Off, Turn-On Propagation Delay, PLH, PHL 8 Clock ...

Page 6

Test Circuits and Waveforms Power Dissipation Test Circuit and Waveforms (R and C outputs are left open www.fairchildsemi.com Switching Time Test Circuit and Waveforms 6 ...

Page 7

Physical Dimensions inches (millimeters) unless otherwise noted 16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow Package Number M16A 7 www.fairchildsemi.com ...

Page 8

Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right ...

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