HYB39S256800CTL-8 Infineon Technologies, HYB39S256800CTL-8 Datasheet - Page 21

• Manufacturer Part Number: HYB39S256800CTL-8
• Manufacturer: Infineon Technologies

Specifications of HYB39S256800CTL-8

• Lead Free Status / Rohs Status: Not Compliant

Timing Diagrams
1. Bank Activate Command Cycle
2. Burst Read Operation
3. Read Interrupted by a Read
4. Read to Write Interval
5. Burst Write Operation
6. Write and Read Interrupt
7. Burst Write & Read with Auto-Precharge
8. AC- Parameters
9. Mode Register Set
10. Power on Sequence and Auto Refresh (CBR)
11. Clock Suspension (using CKE)
12. Power Down Mode and Clock Suspend
13. Self Refresh ( Entry and Exit )
14. Auto Refresh ( CBR )
15. Random Column Read ( Page within same Bank)
16. Random Column Write ( Page within same Bank)
17. Random Row Read ( Interleaving Banks) with Precharge
18. Random Row Write ( Interleaving Banks) with Precharge
19. Precharge Termination of a Burst
INFINEON Technologies
4.1 Read to Write Interval
4.2 Minimum Read to Write Interval
4.3 Non-Minimum Read to Write Interval
6.1 Write Interrupted by a Write
6.2 Write Interrupted by Read
7.1 Burst Write with Auto-Precharge
7.2 Burst Read with Auto-Precharge
8.1 AC Parameters for a Write Timing
8.2 AC Parameters for a Read Timing
11. 1 Clock Suspension During Burst Read CAS Latency = 2
11. 2 Clock Suspension During Burst Read CAS Latency = 3
11. 3 Clock Suspension During Burst Write CAS Latency = 2
11. 4 Clock Suspension During Burst Write CAS Latency = 3
15.1 CAS Latency = 2
15.2 CAS Latency = 3
16.1 CAS Latency = 2
16.2 CAS Latency = 3
17.1 CAS Latency = 2
17.2 CAS Latency = 3
18.1 CAS Latency = 2
18.2 CAS Latency = 3
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256-MBit Synchronous DRAM
HYB39S256400/800/160CT(L)