SCC2691AC1A28-T NXP Semiconductors, SCC2691AC1A28-T Datasheet
SCC2691AC1A28-T
Specifications of SCC2691AC1A28-T
Related parts for SCC2691AC1A28-T
SCC2691AC1A28-T Summary of contents
Page 1
... SCC2691 Universal asynchronous receiver/transmitter (UART) Product data sheet Supersedes data of 1998 Sep 04 INTEGRATED CIRCUITS 2006 Aug 04 ...
Page 2
... UART transmitter when the receiver buffer is full. The UART provides a power-down mode in which the oscillator is frozen but the register contents are stored. This results in reduced power consumption on the order of several magnitudes. The UART is fully TTL compatible and operates from a single +5V power supply. FEATURES Full-duplex asynchronous receiver/transmitter ...
Page 3
... OSCILLATOR POWER DOWN LOGIC X1/CLK CSR ACR X2 CTUR CTLR 2006 Aug 04 COMMERCIAL V = +5V +10 + SCC2691AC1N24 SCC2691AE1N24 SCC2691AC1A28 SCC2691AE1A28 SCC2691AC1D24 INTERNAL DATA BUS CHANNEL A TRANSMIT HOLDING REG TRANSMIT SHIFT REGISTER RECEIVE CONTROL HOLDING REG (3) RECEIVE SHIFT REGISTER MR1 TIMING INPUT PIN CHANGE OF STATE ...
Page 4
... Chip Enable: Active-low input. When low, data transfers between the CPU and the UART are enabled on D0–D7 as controlled by the WRN, RDN and A0–A2 inputs. When CEN is high, the UART is effectively isolated from the data bus and D0–D7 are placed in the 3-State condition. ...
Page 5
... Typical values are at +25 C, typical supply voltages, and typical processing parameters. 4. Test condition for outputs 150pF, except interrupt outputs. Test conditions for interrupt outputs For power down current levels in the 1 A region see the UART application note. 2006 Aug 04 PARAMETER 2 3 ...
Page 6
... Philips Semiconductors Universal asynchronous receiver/transmitter (UART) AC ELECTRICAL CHARACTERISTICS SYMBOL SYMBOL PARAMETER PARAMETER Reset timing (Figure 3) t Reset pulse width RES 5 Bus timing (Figure 4) t A0–A2 setup time to RDN, WRN low AS t A0–A2 hold time from RDN, WRN low AH t CEN setup time to RDN, WRN low ...
Page 7
... Philips Semiconductors Universal asynchronous receiver/transmitter (UART) BLOCK DIAGRAM As shown in the block diagram, the UART consists of: data bus buffer, interrupt control, operation control, timing, receiver and transmitter. Data Bus Buffer The data bus buffer provides the interface between the external and internal data busses controlled by the operation control block to allow read and write operations to take place between the controlling CPU and UART ...
Page 8
... CTUR and CTLR. See further description in CTUR/CTLR section. Receiver and Transmitter The UART is a full-duplex asynchronous receiver/transmitter. The operating frequency for the receiver and transmitter can be selected independently from the baud rate generator, the counter/timer, or from an external input ...
Page 9
... REGISTERS The operation of the UART is programmed by writing control words in the appropriate registers. Operational feedback is provided via status registers which can be read by the CPU. Addressing of the registers is as described in Table 1. ...
Page 10
... MR1. Accesses to MR2 do not change the pointer. MR2[7:6] – Mode Select The UART can operate in one of four modes. MR2[7: the normal mode, with the transmitter and receiver operating independently. MR2[7: places the channel in the automatic echo mode, which automatically re-transmits the received data. The following conditions are true while in automatic echo mode: 1 ...
Page 11
... Philips Semiconductors Universal asynchronous receiver/transmitter (UART) Table 2. Register Bit Formats Bit 7 Bit 6 Bit 5 MR1 (Mode Register 1) RxRTS Control RxINT Select Error Mode RxRDY 0 = Char 1 = yes 1 = FFULL 1 = Block NOTE: *In block error mode, block error conditions must be cleared by using the error reset command (command 4x receiver reset. ...
Page 12
... This field selects the baud rate clock for the transmitter. The field definition is as shown in Table 3. CR – Command Register CR is used to write commands to the UART. Multiple commands can be specified in a single write long as the commands are non-conflicting, e.g., the enable transmitter and reset transmitter commands cannot be specified in a single command word. CR[7:4] – ...
Page 13
... Philips Semiconductors Universal asynchronous receiver/transmitter (UART) CR[1] – Disable Receiver This command terminates operation of the receiver immediately; a character being received will be lost. The command has no effect on the receiver status bits or any other control registers. If the special wake-up mode is programmed, the receiver operates even disabled (see Wake-up Mode). CR[0] – ...
Page 14
... X1/CLK pin to the low state and the X2 pin to the high state external clock is being used to drive the device recommended that the clock source be three-stated or forced low while the UART is in power-down mode in order to prevent the clock driver from being short circuited. ...
Page 15
... Philips Semiconductors Universal asynchronous receiver/transmitter (UART) IMR – Interrupt Mask Register The programming of this register selects which bits in the ISR cause an interrupt output bit in the ISR is a ‘1’ and the corresponding bit in the IMR is a ‘1’, the INTRN output is asserted (low). If the corresponding bit in the IMR is a zero, the state of the bit in the ISR has no effect on the INTRN output ...
Page 16
... Philips Semiconductors Universal asynchronous receiver/transmitter (UART) RDN MPI WRN MPO WRN 1 INTERRUPT OUTPUT RDN 1 INTERRUPT OUTPUT NOTES: 1. INTRN or MPO when used as interrupt outputs. 2. The test for open drain outputs is intended to guarantee switching of the output transistor. Measurement of this response is referenced from the midpoint of the switching signal point 0 ...
Page 17
... Philips Semiconductors Universal asynchronous receiver/transmitter (UART) TxC (INPUT) TxD TxC (1X OUTPUT) RxC (1X INPUT) RxD 2006 Aug 04 1 BIT TIME ( CLOCKS) t TXD t TCS SD00092 Figure 8. Transmit Timing t t RXS RXH SD00093 Figure 9. Receive Timing 17 Product data sheet SCC2691 ...
Page 18
... Philips Semiconductors Universal asynchronous receiver/transmitter (UART) TxD D1 TRANS- MITTER ENABLED TxRDY (SR2) WRN CTSN (MPI) 2 RTSN (MPO) CR[7:4] = 1010 NOTES: 1. TIMING SHOWN FOR MR2[ TIMING SHOWN FOR MR2[ RxD D1 D2 RECEIVER ENABLED RxRDY (SR0) D2 FFULL (SR1) RxRDY/ FFULL 2 MPO RDN OVERRRUN ...
Page 19
... Philips Semiconductors Universal asynchronous receiver/transmitter (UART) MASTER STATION BIT 9 ADD#1 1 TxD TRANSMITTER ENABLED TxRDY (SR2) CSN (WRITE] MR1[4: ADD#1 MR1[ MR1[ PERIPHERAL STATION BIT 9 RxD 0 ADD#1 RECEIVER ENABLED RxRDY (SR0) RDN/WRN MR1[4: The CTS, RTS, CTS Enable Tx signals CTS (Clear To Send) is usually meant signal to the transmitter meaning that it may transmit data to the receiver. The CTS input is on pin MPI. The CTS signal is active low ...
Page 20
... Each read on address H‘2’ will toggle the baud rate test mode. When in the BRG test mode, the baud rates change as shown to the left. This change affects all receivers and transmitters on the DUART. See “Extended baud rates for SCN2681, SCN68681, SCC2691, SCC2692, SCC68681 and SCC2698B” ...
Page 21
... Philips Semiconductors Universal asynchronous receiver/transmitter (UART) DIP24: plastic dual in-line package; 24 leads (300 mil) 2006 Aug 04 21 Product data sheet SCC2691 SOT222-1 ...
Page 22
... Philips Semiconductors Universal asynchronous receiver/transmitter (UART) SO24: plastic small outline package; 24 leads; body width 7.5 mm 2006 Aug 04 22 Product data sheet SCC2691 SOT137-1 ...
Page 23
... Philips Semiconductors Universal asynchronous receiver/transmitter (UART) PLCC28: plastic leaded chip carrier; 28 leads 2006 Aug 04 23 Product data sheet SCC2691 SOT261-2 ...
Page 24
... Philips Semiconductors Universal asynchronous receiver/transmitter (UART) REVISION HISTORY Rev Date Description _3 20060804 Product data sheet (9397 750 14951). Supersedes data of 1998 Sep 04 (9397 750 04358). Modifications: Ordering information: changed Version for PLCC28 from SOT261–3 to SOT261–2 Changed package outline drawing from SOT261–3 to SOT261–2. ...
Page 25
... Philips Semiconductors Universal asynchronous receiver/transmitter (UART) Legal Information Data sheet status [1][2] Document status Product status Objective [short] data sheet Development Preliminary [short] data sheet Qualification Product [short] data sheet Production [1] Please consult the most recently issued document before initiating or completing a design. ...