MT29F4G08ABADAH4-IT:D Micron Technology Inc, MT29F4G08ABADAH4-IT:D Datasheet

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MT29F4G08ABADAH4-IT:D

Manufacturer Part Number
MT29F4G08ABADAH4-IT:D
Description
Manufacturer
Micron Technology Inc
Datasheet

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Part Number:
MT29F4G08ABADAH4-IT:D
Manufacturer:
MICRON
Quantity:
4 560
Part Number:
MT29F4G08ABADAH4-IT:D
Manufacturer:
MICRON
Quantity:
4 000
Part Number:
MT29F4G08ABADAH4-IT:D
Manufacturer:
Micron Technology Inc
Quantity:
10 000
Part Number:
MT29F4G08ABADAH4-IT:D
0
Micron's part numbering system is available at www.micron.com/numbering
Next-Generation NAND Flash Part Numbering System
© 2009 Micron Technology, Inc.
Micron and the Micron logo are trademarks of Micron Technology, Inc.
Products and specifications are subject to change without notice. Dates are estimates only.
Micron Technology
Single-Supply Flash
29F = NAND Flash
29E = Enterprise NAND Flash
Density
1G = 1Gb
2G = 2Gb
4G = 4Gb
8G = 8Gb
16G = 16Gb
32G = 32Gb
64G = 64Gb
128G = 128Gb
256G = 256Gb
Device Width
01 = 1 bit
08 = 8 bits
16 = 16 bits
Level
Mark
A
B
C
Classification
Mark
A
B
C
D
E
F
G
H
J
K
L
M
N
P
Q
R
T
U
V
W
Y
*Contact Micron for help differentiating between standard and next-generation NAND offerings.
Rev. 8/19/09
Level
SLC
Reserved
MLC-2
Next-Generation NAND Flash*
4 + 4
Die
1
1
2
2
2
2
4
4
4
4
4
8
8
8
8
8
nCE
2 + 2
0
1
0
1
2
2
1
2
2
4
4
1
2
2
4
4
MT
RnB
2 + 2
0
1
0
1
2
2
1
2
2
4
1
2
2
4
4
4
IO Channels
29F
1
1
1
1
2
1
1
1
2
1
2
1
1
1
2
1
2
2G
08
A
A
A
A
A
WP -
xx
xx
x
ES : A
Design Revision (shrink)
Production Status
Blank = Production
ES = Engineering Samples
QS = Qualification Samples
MS = Mechanical Sample
Reserved for Future use.
Operating Temperature Range
Blank = Commercial (0°C to +70°C)
IT = Extended (–40°C to +85°C) (AKA ET)
WT = Wireless Temp (–25°C to +85°C)
Speed Grade (Synchronous)
Blank if no speed grade defined
20 = 100MT/s
15 = 133MT/s
12 = 166MT/s
Package Code
WP = 48-pin TSOP I (CPL version) (Pb-free)
WC = 48-pin TSOP I (OCPL version) (Pb-free)
HC = 63-ball VFBGA, 10.5 x 13 x 1.0
C3 = 52-pad ULGA, 12 x 17 x 0.65
C4 = 52-pad VLGA, 12 x 17 x 1.0 (SDP/DDP/QDP)
C5 = 52-pad VLGA, 14 x 18 x 1.0 (SDP/DDP/QDP)
C6 = 52-pad LLGA, 14 x 18 x 1.47 (DDP/QDP/8DP)
C7 = 48-pad LLGA, 12 x 20 x 1.47 (8DP)
C8 = 52-pad WLGA, 14 x 18 x 0.75 (DDP/QDP)
H1 = 100-ball VBGA (Pb-free), 12 x 18 x 1.0
H2 = 100-ball TBGA (Pb-free), 12 x 18 x 1.2
H3 = 100-ball LBGA, (Pb-free) 12 x 18 x 1.4 (DDP/QDP/8DP)
H4 = 63-ball VFBGA, 9 x 11 x 1
Interface
Mark Interface
A
B
D
Generation Feature Set
A = 1st set of device features
B = 2nd set of device features (rev only if different than 1st set)
C = 3rd set of device features (rev only if different)
D = 4th set of device features (rev only if different)
etc.
Operating Voltage Range
A = 3.3V (2.70–3.60V)
B = 1.8V (1.70–1.95V)
C = 3.3V (2.70–3.60V), VccQ 1.8V (1.70–1.95V)
D = 1.8V (1.65–3.6V) SIM
Async only
Sync/Async
SPI

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