AD5313BRU

Manufacturer Part NumberAD5313BRU
DescriptionIC DAC 10BIT DUAL R-R 16-TSSOP
ManufacturerAnalog Devices Inc
AD5313BRU datasheets

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Specifications of AD5313BRU

Rohs StatusRoHS non-compliantSettling Time7µs
Number Of Bits10Data InterfaceSerial
Number Of Converters2Voltage Supply SourceSingle Supply
Power Dissipation (max)2.5mWOperating Temperature-40°C ~ 105°C
Mounting TypeSurface MountPackage / Case16-TSSOP
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FEATURES
AD5303: 2 buffered 8-bit DACs in 1 package
A version: ±1 LSB INL, B version: ±0.5 LSB INL
AD5313: 2 buffered 10-bit DACs in 1 package
A version: ±4 LSB INL, B version: ±2 LSB INL
AD5323: 2 buffered 12-bit DACs in 1 package
A version: ±16 LSB INL, B version: ±8 LSB INL
16-lead TSSOP package
Micropower operation: 300 μA @ 5 V (including reference
current)
Power-down to 200 nA @ 5 V, 50 nA @ 3 V
2.5 V to 5.5 V power supply
Double-buffered input logic
Guaranteed monotonic by design over all codes
Buffered/unbuffered reference input options
Output range: 0 V to V
or 0 V to 2 V
REF
REF
Power-on-reset to 0 V
SDO daisy-chaining option
Simultaneous update of DAC outputs via LDAC pin
Asynchronous CLR facility
Low power serial interface with Schmitt-triggered inputs
On-chip rail-to-rail output buffer amplifiers
APPLICATIONS
Portable battery-powered instruments
Digital gain and offset adjustment
Programmable voltage and current sources
Programmable attenuators
POWER-ON
RESET
SYNC
INTERFACE
LOGIC
SCLK
DIN
SDO
DCEN
LDAC
Rev. B
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registered trademarks are the property of their respective owners.
2.5 V to 5.5 V, 230 μA, Dual Rail-to-Rail
Voltage Output 8-/10-/12-Bit DACs
GENERAL DESCRIPTION
The AD5303/AD5313/AD5323 are dual 8-/10-/12-bit buffered
voltage output DACs in a 16-lead TSSOP package that operate
from a single 2.5 V to 5.5 V supply, consuming 230 μA at 3 V.
Their on-chip output amplifiers allow the outputs to swing rail-to-
rail with a slew rate of 0.7 V/μs. The AD5303/AD5313/AD5323
utilize a versatile 3-wire serial interface that operates at clock
rates up to 30 MHz and is compatible with standard SPI, QSPI™,
MICROWIRE™, and DSP interface standards.
The references for the two DACs are derived from two reference
pins (one per DAC). These reference inputs may be configured
as buffered or unbuffered inputs. The parts incorporate a power-
on reset circuit, which ensures that the DAC outputs power up
to 0 V and remain there until a valid write to the device takes
place. There is also an asynchronous active low CLR pin that
clears both DACs to 0 V. The outputs of both DACs may be
updated simultaneously using the asynchronous LDAC input.
The parts contain a power-down feature that reduces the
current consumption of the devices to 200 nA at 5 V (50 nA
at 3 V) and provides software-selectable output loads while
in power-down mode. The parts may also be used in daisy-
chaining applications using the SDO pin.
The low power consumption of these parts in normal operation
makes them ideally suited to portable battery-operated equip-
ment. The power consumption is 1.5 mW at 5 V and 0.7 mW at
3 V, reducing to 1 μW in power-down mode.
FUNCTIONAL BLOCK DIAGRAM
V
V
A
DD
BUF A
REF
DAC
INPUT
STRING
REGISTER
REGISTER
DAC
POWER-DOWN
LOGIC
DAC
INPUT
STRING
REGISTER
REGISTER
DAC
BUF B
V
B
CLR
PD
REF
Figure 1.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
Fax: 781.461.3113
AD5303/AD5313/AD5323
AD5303/AD5313/AD5323
V
A
BUFFER
OUT
RESISTOR
NETWORK
V
B
BUFFER
OUT
GAIN-SELECT
RESISTOR
LOGIC
NETWORK
GND
©1999–2007 Analog Devices, Inc. All rights reserved.
www.analog.com

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AD5313BRU Summary of contents

  • Page 1

    FEATURES AD5303: 2 buffered 8-bit DACs in 1 package A version: ±1 LSB INL, B version: ±0.5 LSB INL AD5313: 2 buffered 10-bit DACs in 1 package A version: ±4 LSB INL, B version: ±2 LSB INL AD5323: 2 buffered ...

  • Page 2

    AD5303/AD5313/AD5323 TABLE OF CONTENTS Features .............................................................................................. 1 Applications....................................................................................... 1 General Description ......................................................................... 1 Functional Block Diagram .............................................................. 1 Revision History ............................................................................... 2 Specifications..................................................................................... 3 AC Characteristics........................................................................ 6 Timing Characteristics ................................................................ 6 Absolute Maximum Ratings............................................................ 8 ESD Caution.................................................................................. 8 Pin Configuration ...

  • Page 3

    SPECIFICATIONS kΩ to GND REF L Table 1. 2 Parameter Min Typ PERFORMANCE AD5303 Resolution 8 Relative Accuracy ±0.15 Differential ...

  • Page 4

    AD5303/AD5313/AD5323 2 Parameter Min 5 LOGIC INPUTS Input Current Input Low Voltage Input High Voltage, V 2.4 IH 2.1 2.0 Pin Capacitance 5 LOGIC OUTPUT (SDO ± 10% DD Output Low Voltage Output High ...

  • Page 5

    OUTPUT IDEAL VOLTAGE ACTUAL POSITIVE OFFSET DAC CODE ERROR DEAD BAND AMPLIFIER FOOTROOM (1mV) NEGATIVE OFFSET ERROR Figure 2. Transfer Function with Negative Offset GAIN ERROR PLUS OFFSET ERROR OUTPUT VOLTAGE POSITIVE OFFSET ERROR Rev Page 5 of ...

  • Page 6

    AD5303/AD5313/AD5323 1 AC CHARACTERISTICS kΩ to GND Table 2. Parameter 2 Output Voltage Settling Time AD5303 AD5313 AD5323 Slew Rate Major-Code Transition Glitch Energy Digital Feedthrough Analog ...

  • Page 7

    TO OUTPUT PIN Figure 4. Load Circuit for Digital Output (SDO) Timing Specifications SCLK SYNC DIN* DB15 LDAC LDAC CLR * SEE THE INPUT SHIFT REGISTER SECTION. Figure 5. Serial ...

  • Page 8

    AD5303/AD5313/AD5323 ABSOLUTE MAXIMUM RATINGS 25°C, unless otherwise noted. A Table 4. Parameter V to GND DD Digital Input Voltage to GND Digital Output Voltage to GND Reference Input Voltage to GND GND ...

  • Page 9

    PIN CONFIGURATION AND FUNCTION DESCRIPTIONS Table 5. Pin Function Descriptions Pin No. Mnemonic Description 1 CLR Active Low Control Input. Loads all zeros to both input and DAC registers. 2 LDAC Active Low Control Input. Transfers the contents of the ...

  • Page 10

    AD5303/AD5313/AD5323 TERMINOLOGY Relative Accuracy or Integral Nonlinearity (INL) For the DAC, relative accuracy or integral nonlinearity is a measure of the maximum deviation, in LSB, from a straight line passing through the actual endpoints of the DAC transfer function. A ...

  • Page 11

    TYPICAL PERFORMANCE CHARACTERISTICS 1 25° 0.5 0 –0.5 –1 100 150 CODE Figure 7. AD5303 Typical INL Plot 25° –1 ...

  • Page 12

    AD5303/AD5313/AD5323 1.00 0.75 0.50 0.25 MAX INL MAX DNL 0 MIN DNL –0.25 MIN INL –0.50 –0.75 –1. (V) REF Figure 13. AD5303 INL and DNL Error vs ...

  • Page 13

    BOTH DACS IN GAIN-OF-TWO MODE REFERENCE INPUTS BUFFERED 500 400 –40°C 300 +105°C +25°C 200 100 0 2.5 3.0 3.5 4.0 4.5 V (V) DD Figure 19. Supply Current vs. Supply Voltage 1.0 BOTH DACS IN 0.9 THREE-STATE CONDITION ...

  • Page 14

    AD5303/AD5313/AD5323 2.50 2.49 2.48 2.47 1µs/DIV Figure 25. AD5323 Major-Code Transition 10 0 –10 –20 –30 –40 –50 –60 10 100 1k 10k FREQUENCY(Hz) Figure 26. Multiplying Bandwidth (Small-Signal Frequency Response) 100k 1M 10M Rev Page 14 of ...

  • Page 15

    FUNCTIONAL DESCRIPTION The AD5303/AD5313/AD5323 are dual resistor-string DACs fabricated on a CMOS process with resolutions of 8-/10-/12-bits respectively. They contain reference buffers and output buffer amplifiers, and are written to via a 3-wire serial interface. They operate from single supplies ...

  • Page 16

    AD5303/AD5313/AD5323 POWER-ON RESET The AD5303/AD5313/AD5323 are provided with a power-on reset function, so that they power defined state. The power-on state is with output range and the output REF set Both ...

  • Page 17

    SERIAL INTERFACE The AD5303/AD5313/AD5323 are controlled over a versatile, 3-wire serial interface, which operates at clock rates MHz and is compatible with SPI, QSPI, MICROWIRE, and DSP interface standards. INPUT SHIFT REGISTER The input shift register is ...

  • Page 18

    AD5303/AD5313/AD5323 DB15 (MSB) A/B GAIN DB15 (MSB) A/B GAIN DB15 (MSB) A/B GAIN PD1 PD0 DATA BITS Figure 31. AD5303 Input Shift Register Contents PD1 PD0 ...

  • Page 19

    POWER-DOWN MODES The AD5303/AD5313/AD5323 have very low power consump- tion, dissipating only 0.7 mW with supply and 1.5 mW with supply. Power consumption can be further reduced when the DACs are not in use ...

  • Page 20

    AD5303/AD5313/AD5323 MICROPROCESSER INTERFACING AD5303/AD5313/AD5323 TO ADSP-2101 INTERFACE Figure 35 shows a serial interface between the AD5303/AD5313/ AD5323 and the ADSP-2101. The ADSP-2101 should be set up to operate in the SPORT transmit alternate framing mode. The ADSP-2101 sport is programmed ...

  • Page 21

    APPLICATIONS INFORMATION TYPICAL APPLICATION CIRCUIT The AD5303/AD5313/AD5323 can be used with a wide range of reference voltages, especially if the reference inputs are con- figured to be unbuffered, in which case the devices offer a full, one-quadrant multiplying capability over ...

  • Page 22

    AD5303/AD5313/AD5323 OPTO-ISOLATED INTERFACE FOR PROCESS CONTROL APPLICATIONS The AD5303/AD5313/AD5323 has a versatile 3-wire serial interface making it ideal for generating accurate voltages in process control and industrial applications. Due to noise, safety requirements, or distance, it may be necessary to ...

  • Page 23

    COARSE AND FINE ADJUSTMENT USING THE AD5303/AD5313/AD5323 The DACs in the AD5303/AD5313/AD5323 can be paired together to form a coarse and fine adjustment function, as shown in Figure 45. DAC A provides the coarse adjustment while DAC B provides the ...

  • Page 24

    AD5303/AD5313/AD5323 SCLK t 8 SYNC DIN DB15 SDO POWER SUPPLY BYPASSING AND GROUNDING In any circuit where accuracy is important, careful considera- tion of the power supply and ground return layout helps to ensure the rated performance. The printed circuit ...

  • Page 25

    ... AD5313ARUZ –40°C to +105°C AD5313BRU –40°C to +105°C AD5313BRU-REEL –40°C to +105°C AD5313BRU-REEL7 –40°C to +105°C 1 AD5313BRUZ –40°C to +105°C AD5323ARU –40°C to +105°C AD5323ARU-REEL7 –40°C to +105°C AD5323ARUZ 1 –40°C to +105°C AD5323ARUZ-REEL7 1 – ...

  • Page 26

    AD5303/AD5313/AD5323 NOTES Rev Page ...

  • Page 27

    NOTES AD5303/AD5313/AD5323 Rev Page ...

  • Page 28

    AD5303/AD5313/AD5323 NOTES ©1999–2007 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. C00472-0-6/07(B) Rev Page ...

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