AD5330BRU Analog Devices Inc, AD5330BRU Datasheet

no-image

AD5330BRU

Manufacturer Part Number
AD5330BRU
Description
IC DAC 8BIT SNGL VOUT 20-TSSOP
Manufacturer
Analog Devices Inc
Datasheet

Specifications of AD5330BRU

Rohs Status
RoHS non-compliant
Settling Time
6µs
Number Of Bits
8
Data Interface
Parallel
Number Of Converters
1
Voltage Supply Source
Single Supply
Power Dissipation (max)
1.25mW
Operating Temperature
-40°C ~ 105°C
Mounting Type
Surface Mount
Package / Case
20-TSSOP

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
AD5330BRU-REEL7
Manufacturer:
AD
Quantity:
7 276
Part Number:
AD5330BRU-REEL7
Manufacturer:
ADI
Quantity:
8 000
Part Number:
AD5330BRUZ
Manufacturer:
VK
Quantity:
3 200
Part Number:
AD5330BRUZ
Manufacturer:
ADI/亚德诺
Quantity:
20 000
Part Number:
AD5330BRUZ-REEL7
Manufacturer:
ATMEL
Quantity:
2 804
Part Number:
AD5330BRUZ-REEL7
Manufacturer:
ADI/亚德诺
Quantity:
20 000
Part Number:
AD5330BRUZREEL7
Manufacturer:
AD
Quantity:
6 968
FEATURES
AD5330: single 8-bit DAC in 20-lead TSSOP
AD5331: single 10-bit DAC in 20-lead TSSOP
AD5340: single 12-bit DAC in 24-lead TSSOP
AD5341: single 12-bit DAC in 20-lead TSSOP
Low power operation: 115 μA @ 3 V, 140 μA @ 5 V
Power-down to 80 nA @ 3 V, 200 nA @ 5 V via PD Pin
2.5 V to 5.5 V power supply
Double-buffered input logic
Guaranteed monotonic by design over all codes
Buffered/unbuffered reference input options
Output range: 0 V to V
Power-on reset to 0 V
Simultaneous update of DAC outputs via LDAC pin
Asynchronous CLR facility
Low power parallel data interface
On-chip rail-to-rail output buffer amplifiers
Temperature range: −40°C to +105°C
APPLICATIONS
Portable battery-powered instruments
Digital gain and offset adjustment
Programmable voltage and current sources
Programmable attenuators
Industrial process control
Rev. A
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registered trademarks are the property of their respective owners.
REF
or 0 V to 2 × V
LDAC
GAIN
BUF
CLR
DB
DB
WR
CS
. .
7
0
20
13
10
1
8
6
7
9
REF
RESET
POWER-ON
REGISTER
RESET
Single Voltage-Output 8-/10-/12-Bit DACs
FUNCTIONAL BLOCK DIAGRAM
INPUT
2.5 V to 5.5 V, 115 μA, Parallel Interface
REGISTER
DAC
Figure 1. AD5330
AD5330/AD5331/AD5340/AD5341
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
Fax: 781.461.3113
GENERAL DESCRIPTION
The AD5330/AD5331/AD5340/AD5341
bit DACs. They operate from a 2.5 V to 5.5 V supply consuming
just 115 μA at 3 V and feature a power-down mode that further
reduces the current to 80 nA. The devices incorporate an on-chip
output buffer that can drive the output to both supply rails, but
the AD5330, AD5340, and AD5341 allow a choice of buffered
or unbuffered reference input.
The AD5330/AD5331/AD5340/AD5341 have a parallel
interface. CS selects the device and data is loaded into the
input registers on the rising edge of WR .
The GAIN pin allows the output range to be set at 0 V to V
0 V to 2 × V
Input data to the DACs is double-buffered, allowing simultane-
ous update of multiple DACs in a system using the LDAC pin.
An asynchronous CLR input is also provided, which resets the
contents of the input register and the DAC register to all zeros.
These devices also incorporate a power-on reset circuit that
ensures that the DAC output powers on to 0 V and remains
there until valid data is written to the device.
The AD5330/AD5331/AD5340/AD5341 are available in thin
shrink small outline packages (TSSOP).
1
8-BIT
DAC
V
Protected by U.S. Patent Number 5,969,657.
REF
3
BUFFER
REF
AD5330
V
.
12
POWER-DOWN
DD
©2000–2008 Analog Devices, Inc. All rights reserved.
LOGIC
PD
11
GND
5
4
V
OUT
1
are single 8-/10-/12-
www.analog.com
REF
or

Related parts for AD5330BRU

AD5330BRU Summary of contents

Page 1

FEATURES AD5330: single 8-bit DAC in 20-lead TSSOP AD5331: single 10-bit DAC in 20-lead TSSOP AD5340: single 12-bit DAC in 24-lead TSSOP AD5341: single 12-bit DAC in 20-lead TSSOP Low power operation: 115 μ 140 μA @ ...

Page 2

AD5330/AD5331/AD5340/AD5341 TABLE OF CONTENTS Features .............................................................................................. 1 Applications ....................................................................................... 1 General Description ......................................................................... 1 Functional Block Diagram .............................................................. 1 Revision History ............................................................................... 2 Specifications ..................................................................................... 3 AC Characteristics ........................................................................ 4 Timing Characteristics ................................................................ 5 Absolute Maximum Ratings ............................................................ 6 ESD ...

Page 3

SPECIFICATIONS kΩ to GND REF L Table 1. 1 Parameter Min DC PERFORMANCE 3, 4 AD5330 Resolution Relative Accuracy Differential Nonlinearity AD5331 Resolution Relative ...

Page 4

AD5330/AD5331/AD5340/AD5341 1 Parameter Min POWER REQUIREMENTS V 2 (Normal Mode (Power-Down Mode 4 5.5 V ...

Page 5

TIMING CHARACTERISTICS 5.5 V, all specifications T DD Table 3. Parameter Limit MIN MAX 4.5 ...

Page 6

AD5330/AD5331/AD5340/AD5341 ABSOLUTE MAXIMUM RATINGS T = 25°C, unless otherwise noted. A Table 4. Parameter V to GND DD Digital Input Voltage to GND Digital Output Voltage to GND Reference Input Voltage to GND V to GND OUT Operating Temperature Range ...

Page 7

PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS POWER-ON RESET BUF 1 INPUT GAIN 8 REGISTER RESET 9 CLR 10 LDAC Figure 3. AD5330 Functional Block Diagram Table 5. AD5330 Pin ...

Page 8

AD5330/AD5331/AD5340/AD5341 POWER-ON RESET INPUT GAIN 8 REGISTER RESET 9 CLR LDAC 10 Figure 5. AD5331 Functional Block Diagram Table 6. AD5331 Pin ...

Page 9

POWER-ON RESET BUF 3 INPUT GAIN 10 REGISTER RESET CLR 11 LDAC 12 Figure 7. AD5340 Functional Block Diagram Table 7. AD5340 ...

Page 10

AD5330/AD5331/AD5340/AD5341 POWER-ON RESET HIGH BYTE REGISTER BUF 2 GAIN LOW BYTE REGISTER HBEN RESET 7 WR CLR 9 LDAC 10 Figure 9. AD5341 Functional Block Diagram Table 8. ...

Page 11

TERMINOLOGY Relative Accuracy or Integral Nonlinearity (INL) For the DAC, relative accuracy or INL is a measure of the maximum deviation, in LSBs, from a straight line passing through the actual endpoints of the DAC transfer function. Typical INL vs. ...

Page 12

AD5330/AD5331/AD5340/AD5341 Offset Error Drift This is a measure of the change in offset error with changes in temperature expressed in (ppm of full-scale range)/°C. Gain Error Drift This is a measure of the change in gain error with ...

Page 13

TYPICAL PERFORMANCE CHARACTERISTICS 1 25° 0.5 0 –0.5 –1 100 150 CODE Figure 14. AD5330 Typical INL Plot 25° –1 ...

Page 14

AD5330/AD5331/AD5340/AD5341 1. 25° 0.75 0.50 0.25 MAX INL MAX DNL 0 MIN DNL –0.25 MIN INL –0.50 –0.75 –1. (V) REF Figure 20. AD5330 INL and DNL Error vs. V ...

Page 15

T = 25°C A 200 100 0 2.5 3.0 3.5 4.0 4.5 V (V) DD Figure 26. Supply Current vs. Supply Voltage 0 25°C A 0.4 0.3 0.2 0.1 0 2.5 3.0 3.5 4.0 4.5 V (V) ...

Page 16

AD5330/AD5331/AD5340/AD5341 100 110 120 130 140 150 160 170 I (µA) DD Figure 32. I Histogram with and 0.917 0.916 0.915 0.914 0.913 0.912 0.911 0.910 0.909 ...

Page 17

THEORY OF OPERATION The AD5330/AD5331/AD5340/AD5341 are single resistor- string DACs fabricated on a CMOS process with resolutions of 8, 10, and 12 bits, respectively. They are written to using a parallel interface. They operate from single supplies of 2.5 V ...

Page 18

AD5330/AD5331/AD5340/AD5341 PARALLEL INTERFACE The AD5330, AD5331, and AD5340 load their data as a single 8-, 10-, or 12-bit word, while the AD5341 loads data as a low byte of eight bits and a high byte containing four bits. DOUBLE-BUFFERED INTERFACE ...

Page 19

POWER-DOWN MODE The AD5330/AD5331/AD5340/AD5341 have low power consumption, dissipating only 0.35 mW with supply and 0.7 mW with supply. Power consumption can be further reduced when the DAC is not in use by putting ...

Page 20

AD5330/AD5331/AD5340/AD5341 SUGGESTED DATABUS FORMATS In most applications, GAIN and BUF are hard-wired. However, if more flexibility is required, they can be included in a databus. This enables the user to software program GAIN, giving the option of doubling the resolution ...

Page 21

APPLICATIONS INFORMATION TYPICAL APPLICATION CIRCUITS The AD5330/AD5331/AD5340/AD5341 can be used with a wide range of reference voltages, especially if the reference inputs are configured to be unbuffered, in which case the devices offer full, one-quadrant multiplying capability over a reference ...

Page 22

AD5330/AD5331/AD5340/AD5341 a system, all the DACs can be updated simultaneously using a common LDAC line. A common CLR line can also be used to reset all DAC outputs to zero. HBEN* WR LDAC CLR 1Y0 ENABLE ...

Page 23

Table 11. Overview of AD53xx Parallel Devices Part No. Resolution Bits DNL No Singles AD5330 8 ±0.25 1 AD5331 10 ±0.5 1 AD5340 12 ±1.0 1 AD5341 12 ±1.0 1 Duals AD5332 8 ±0.25 2 AD5333 10 ±0.5 ...

Page 24

AD5330/AD5331/AD5340/AD5341 OUTLINE DIMENSIONS COPLANARITY 0.15 0.05 6.60 6.50 6. 4.50 4.40 4.30 6.40 BSC 1 10 PIN 1 0.65 BSC 1.20 MAX 0.15 0.20 0.05 0.09 0.30 0.19 SEATING 0.10 PLANE COMPLIANT TO JEDEC STANDARDS MO-153-AC Figure 48. ...

Page 25

... AD5330BRU –40°C to +105°C AD5330BRU-REEL –40°C to +105°C AD5330BRU-REEL7 –40°C to +105°C 1 AD5330BRUZ –40°C to +105°C 1 AD5330BRUZ-REEL –40°C to +105°C 1 AD5330BRUZ-REEL7 –40°C to +105°C AD5331BRU –40°C to +105°C AD5331BRU-REEL –40°C to +105°C AD5331BRU-REEL7 – ...

Page 26

AD5330/AD5331/AD5340/AD5341 NOTES Rev Page ...

Page 27

NOTES AD5330/AD5331/AD5340/AD5341 Rev Page ...

Page 28

AD5330/AD5331/AD5340/AD5341 NOTES ©2000–2008 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. D06852-0-2/08(A) Rev Page ...

Related keywords