AD5330BRU-REEL7 Analog Devices Inc, AD5330BRU-REEL7 Datasheet - Page 3

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AD5330BRU-REEL7

Manufacturer Part Number
AD5330BRU-REEL7
Description
IC DAC 8BIT SNGL VOUT 20-TSSOP
Manufacturer
Analog Devices Inc
Datasheet

Specifications of AD5330BRU-REEL7

Rohs Status
RoHS non-compliant
Settling Time
6µs
Number Of Bits
8
Data Interface
Parallel
Number Of Converters
1
Voltage Supply Source
Single Supply
Power Dissipation (max)
1.25mW
Operating Temperature
-40°C ~ 105°C
Mounting Type
Surface Mount
Package / Case
20-TSSOP

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SPECIFICATIONS
V
Table 1.
Parameter
DC PERFORMANCE
DAC REFERENCE INPUT
OUTPUT CHARACTERISTICS
LOGIC INPUTS
DD
AD5330
AD5331
AD5340/AD5341
Offset Error
Gain Error
Lower Deadband
Upper Deadband
Offset Error Drift
Gain Error Drift
DC Power Supply Rejection Ratio
V
V
Reference Feedthrough
Minimum Output Voltage
Maximum Output Voltage
DC Output Impedance
Short-Circuit Current
Power-Up Time
Input Current
Input Low Voltage, V
Input High Voltage, V
Pin Capacitance
REF
REF
= 2.5 V to 5.5 V, V
Resolution
Relative Accuracy
Differential Nonlinearity
Resolution
Relative Accuracy
Differential Nonlinearity
Resolution
Relative Accuracy
Differential Nonlinearity
Input Range
Input Impedance
1
6
6
3, 4
6
5
REF
6
IL
IH
= 2 V, R
6
4, 7
4, 7
6
L
= 2 kΩ to GND; C
Min
1
0.25
2.4
2.1
2.0
Typ
8
±0.15
±0.02
10
±0.5
±0.05
12
±2
±0.2
±0.4
±0.15
10
10
−12
−5
−60
>10
180
90
−90
0.001
V
0.5
25
15
2.5
5
±1
3
B Version
DD
− 0.001
L
= 200 pF to GND; all specifications T
2
Max
±1
±0.25
±4
±0.5
±16
±1
±3
±1
60
60
V
V
0.8
0.6
0.5
DD
DD
Rev. A | Page 3 of 28
Unit
Bits
LSB
LSB
Bits
LSB
LSB
Bits
LSBs
LSB
% of FSR
% of FSR
mV
mV
ppm of FSR/°C
ppm of FSR/°C
dB
V
V
dB
V min
V max
Ω
mA
mA
μs
μs
μA
V
V
V
V
V
V
pF
Conditions/Comments
Guaranteed monotonic by design over all codes
Guaranteed monotonic by design over all codes
Guaranteed monotonic by design over all codes
Lower deadband exists only if offset error is negative
V
ΔV
Buffered reference (AD5330, AD5340, and AD5341)
Unbuffered reference
Buffered reference (AD5330, AD5340, and AD5341)
Unbuffered reference; gain = 1, input impedance = R
Unbuffered reference; gain = 2, input impedance = R
Frequency = 10 kHz
Rail-to-rail operation
V
V
Coming out of power-down mode; V
Coming out of power-down mode; V
V
V
V
V
V
V
AD5330/AD5331/AD5340/AD5341
DD
DD
DD
DD
DD
DD
DD
DD
DD
DD
= 5 V; upper deadband exists only if V
= 5 V
= 3 V
= 5 V ± 10%
= 3 V ± 10%
= 2.5 V
= 5 V ± 10%
= 3 V ± 10%
= 2.5 V
= ±10%
MIN
to T
MAX
, unless otherwise noted.
DD
DD
= 5 V
= 3 V
REF
= V
DD
DAC
DAC

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