ATF750LVC-15PC Atmel, ATF750LVC-15PC Datasheet
ATF750LVC-15PC
Specifications of ATF750LVC-15PC
Related parts for ATF750LVC-15PC
ATF750LVC-15PC Summary of contents
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... Increased product terms, sum terms, flip-flops and output logic configurations translate into more usable gates. High-speed logic and uniform, pre- dictable delays guarantee fast in-system performance. The ATF750LVC is a high- performance CMOS (electrically-erasable) complex programmable logic device (CPLD) that utilizes Atmel’s proven electrically-erasable technology. ...
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... VCC 3.1 Note: Each of the ATF750LVC’s 22 logic pins can be used as an input. Ten of these can be used as inputs, outputs or bi-directional I/O pins. Each flip-flop is individually configurable as either D- or T-type. Each flip-flop output is fed back into the array independently. This allows burying of all the sum terms and flip-flops ...
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... Maximum output pin voltage is V (1) which may overshoot to 7V for pulses of less than 20 ns with VCC at VCC max. Commercial 0°C - 70°C 3.0 - 5.25V CKMUX CKi LOGIC CLK CELL CLOCK PIN SELECT PRODUCT TERM ATF750LVC + 0.75V DC, CC Industrial -40°C - +85°C 3 ...
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... Bus-friendly Pin-keeper Input and I/Os All input and I/O pins on the ATF750LVC have programmable “pin-keeper” circuits. If acti- vated, when any pin is driven high or low and then subsequently left floating, it will stay at that previous high or low level. This circuitry prevents unused input and I/O lines from floating to intermediate voltage levels, which cause unnecessary power consumption and system noise ...
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... Max Com., Ind Mil Min Com -100 µ Min < (10% to 90%) ATF750LVC Min Typ 3.0 3.3 4.75 5.0 4.5 5 100 110 -0.6 2.0 VCC - 0.3V 2.4 VCC 316 Ω 348 Ω Max Units 3.6 V 5. µA 10 µ ...
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... MAX SF No Feedback 1/( Asynchronous Reset Width AW t Asynchronous Reset Recovery Time AR t Asynchronous Reset to Registered Output Reset AP t Setup Time, Synchronous Preset SP Note: 1. See ordering information for valid part numbers. ATF750LVC 6 (1) (1) -15 (5V Operation) Min ) -15 (3V Operation) Max Min Max ...
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... External Feedback 1 Internal Feedback 1/t MAXS SFS No Feedback 1 Asynchronous Reset Width AW t Asynchronous Reset Recovery Time ARS t Asynchronous Reset to Registered Output Reset AP t Setup Time, Synchronous Preset SPS 1447F–PLD–11/08 ( COS + t CFS ATF750LVC -15 (5V Operation) -15 (3V Operation) Min Max Min ...
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... Functional Logic Diagram ATF750LVC, Upper Half ATF750LVC 8 1447F–PLD–11/08 ...
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... Functional Logic Diagram ATF750LVC, Lower Half 1447F–PLD–11/08 ATF750LVC 9 ...
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... Independent I/O Pin and Feedback Paths Each I/O pin on the ATF750LVC has a dedicated input path. Each of the 20 registers has its own feedback terms into the array as well. This feature, combined with individual product terms for each I/O’ ...
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... ATF750LVC OUTPUT SOURCE CURRENT VS. SUPPLY VOLTAGE(V 0 -10 -20 -30 -40 -50 -60 -70 3 3.25 3.3 3.5 3.6 4 4.25 4.5 4.75 5 5.25 5.5 SUPPLY VOLTAGE (V) ATF75LVC INPUT CURRENT VS. INPUT VOLTAGE WITH PIN KEEPER -10 -15 -20 -25 0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 INPUT VOLTAGE (V) ATF750LVC SUPPLY CURRENT VS ...
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... Frequency (MHz) ATF750LVC 140 120 100 ioh@vcc=3. ioh@Vcc=5. 4 VCC=3.3V At VCC=5.0V -0.02 -0.04 -0.06 -0. 100 ATF750LVC OUTPUT SINK CURRENT VS. OUTPUT VOLTAGE ( 0.2 0.5 1 1.5 2 2 (V) OL NORMALIZED SUPPLY CURRENT OVER TEMPERATURE ( 3.3V & 5.0V) CC 0.1 0.08 0.06 0.04 0. Temperature o C) Iol AT Vcc=3 ...
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... ATF750LVC Ordering Information 23.1 ATF750LVC Green Package Options (Pb/Halide-free/RoHS Compliant Ext COS MAXS (ns) (ns) ( Note: 1. Special order only; TSSOP package requires special thermal management. 28J 28-Lead, Plastic J-leaded Chip Carrier (PLCC) 24P3 24-lead, 0.300’ Wide, Plastic Dual Inline Package (PDIP) 24S 24-lead, 0.300” ...
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... Allowable protrusion is .010"(0.254 mm) per side. Dimension D1 and E1 include mold mismatch and are measured at the extreme material condition at the upper or lower parting line. 3. Lead coplanarity is 0.004" (0.102 mm) maximum. 2325 Orchard Parkway San Jose, CA 95131 R ATF750LVC 14 1.14(0.045) X 45˚ PIN NO. 1 IDENTIFIER E1 E ...
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... Mold Flash or Protrusion shall not exceed 0.25 mm (0.010"). 2325 Orchard Parkway San Jose, CA 95131 R 1447F–PLD–11/08 D PIN TITLE 24P3, 24-lead (0.300"/7.62 mm Wide) Plastic Dual Inline Package (PDIP) ATF750LVC E1 A1 COMMON DIMENSIONS (Unit of Measure = mm) MIN NOM SYMBOL A – – A1 0.381 – D 31.623 – ...
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... SOIC PIN 1 ID PIN 1 E 0º ~ 8º 2325 Orchard Parkway San Jose, CA 95131 R ATF750LVC TITLE 24S, 24-lead (0.300" body) Plastic Gull Wing Small Outline (SOIC) COMMON DIMENSIONS (Unit of Measure = mm) MIN MAX SYMBOL NOM NOTE A – – 2.65 A1 0.10 – ...
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... Orchard Parkway San Jose, CA 95131 R 1447F–PLD–11/08 0.30(0.012) 0.19(0.007) 4.48(0.176) 4.30(0.169) 0.65(0.0256)BSC 7.90(0.311) 7.70(0.303) 0.15(0.006) 0.05(0.002) 0.75(0.030) 0.45(0.018) TITLE 24X, 24-lead (4.4 mm body width) Plastic Thin Shrink Small Outline Package (TSSOP) ATF750LVC 6.50(0.256) 6.25(0.246) 1.20(0.047)MAX 0.20(0.008) 0.09(0.004) 04/11/2001 DRAWING NO. 24X REV ...
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... Revision History Revision Level – Release Date F – November 2008 ATF750LVC 18 History Updated datasheet with extended voltage range offering. Removed the leaded parts offering. 1447F–PLD–11/08 ...
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... Disclaimer: The information in this document is provided in connection with Atmel products. No license, express or implied, by estoppel or otherwise, to any intellectual property right is granted by this document or in connection with the sale of Atmel products. EXCEPT AS SET FORTH IN ATMEL’S TERMS AND CONDI- TIONS OF SALE LOCATED ON ATMEL’S WEB SITE, ATMEL ASSUMES NO LIABILITY WHATSOEVER AND DISCLAIMS ANY EXPRESS, IMPLIED OR STATUTORY WARRANTY RELATING TO ITS PRODUCTS INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTY OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT ...