IC MAX 3000A CPLD 64 100-TQFP

EPM3064ATC100-10N

Manufacturer Part NumberEPM3064ATC100-10N
DescriptionIC MAX 3000A CPLD 64 100-TQFP
ManufacturerAltera
SeriesMAX® 3000A
EPM3064ATC100-10N datasheet
 


Specifications of EPM3064ATC100-10N

Programmable TypeIn System ProgrammableDelay Time Tpd(1) Max10.0ns
Voltage Supply - Internal3 V ~ 3.6 VNumber Of Logic Elements/blocks4
Number Of Macrocells64Number Of Gates1250
Number Of I /o66Operating Temperature0°C ~ 85°C
Mounting TypeSurface MountPackage / Case100-TQFP, 100-VQFP
Voltage3.0 V ~ 3.6 VMemory TypeEEPROM
Number Of Logic Elements/cells4Lead Free Status / RoHS StatusLead free / RoHS Compliant
Features-Other names544-1974
EPM3064ATC100-10N
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MAX 3000A Programmable Logic Device Family Data Sheet
Table 25. EPM3512A Internal Timing Parameters (Part 2 of 2)
Symbol
Parameter
t
Output buffer and pad delay,
OD3
slow slew rate = on
V
= 2.5 V or 3.3 V
CCIO
t
Output buffer enable delay,
ZX1
slow slew rate = off
V
= 3.3 V
CCIO
t
Output buffer enable delay,
ZX2
slow slew rate = off
V
= 2.5 V
CCIO
t
Output buffer enable delay,
ZX3
slow slew rate = on
V
= 3.3 V
CCIO
t
Output buffer disable delay
XZ
t
Register setup time
SU
t
Register hold time
H
t
Register setup time of fast input
FSU
t
Register hold time of fast input
FH
t
Register delay
RD
t
Combinatorial delay
COMB
t
Array clock delay
IC
t
Register enable time
EN
t
Global control delay
GLOB
t
Register preset time
PRE
t
Register clear time
CLR
t
PIA delay
PIA
t
Low-power adder
LPA
Notes to tables:
(1)
These values are specified under the recommended operating conditions, as shown in
Figure 11 on page 27
for more information on switching waveforms.
(2)
These values are specified for a PIA fan–out of one LAB (16 macrocells). For each additional LAB fan–out in these
devices, add an additional 0.1 ns to the PIA timing value.
(3)
This minimum pulse width for preset and clear applies for both global clear and array controls. The t
must be added to this minimum width if the clear or reset signal incorporates the t
path.
(4)
These parameters are measured with a 16–bit loadable, enabled, up/down counter programmed into each LAB.
(5)
The t
parameter must be added to the t
LPA
running in low–power mode.
38
Note (1)
Conditions
Speed Grade
-7
Min
Max
C1 = 35 pF
6.0
C1 = 35 pF
4.0
C1 = 35 pF
4.5
C1 = 35 pF
9.0
C1 = 5 pF
4.0
2.1
0.6
1.6
1.4
1.3
0.6
1.8
1.0
1.7
1.0
1.0
(2)
3.0
(5)
4.5
, t
, t
, t
, t
, t
, and t
LAD
LAC
IC
EN
SEXP
ACL
Unit
-10
Min
Max
6.5
ns
5.0
ns
5.5
ns
10.0
ns
5.0
ns
3.0
ns
0.8
ns
1.6
ns
1.4
ns
1.7
ns
0.8
ns
2.3
ns
1.3
ns
2.2
ns
1.4
ns
1.4
ns
4.0
ns
5.0
ns
Table 13 on page
23. See
parameter
LPA
parameter into the signal
LAD
parameters for macrocells
CPPW
Altera Corporation