EPM3064ATC44-4N Altera, EPM3064ATC44-4N Datasheet - Page 34

• Manufacturer Part Number: EPM3064ATC44-4N
• Description: IC MAX 3000A CPLD 64 44-TQFP
• Manufacturer: Altera
• Series: MAX® 3000Ar

Specifications of EPM3064ATC44-4N

• Programmable Type: In System Programmable
• Delay Time Tpd(1) Max: 4.5ns
• Voltage Supply - Internal: 3 V ~ 3.6 V
• Number Of Logic Elements/blocks: 4
• Number Of Macrocells: 64
• Number Of Gates: 1250
• Number Of I /o: 34
• Operating Temperature: 0°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 44-TQFP, 44-VQFP
• Voltage: 3.0 V ~ 3.6 V
• Memory Type: EEPROM
• Number Of Logic Elements/cells: 4
• Family Name: MAX 3000A
• # Macrocells: 64
• Number Of Usable Gates: 1250
• Frequency (max): 250MHz
• Propagation Delay Time: 4.5ns
• Number Of Logic Blocks/elements: 4
• # I/os (max): 34
• Operating Supply Voltage (typ): 3.3V
• In System Programmable: Yes
• Operating Supply Voltage (min): 3V
• Operating Supply Voltage (max): 3.6V
• Operating Temp Range: 0C to 70C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 44
• Package Type: TQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Features: -
• Lead Free Status / Rohs Status: Compliant
• Other names: 544-1978; EPM3064ATC44-4N

MAX 3000A Programmable Logic Device Family Data Sheet
34
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Symbol
SU
H
RD
COMB
IC
EN
GLOB
PRE
CLR
PIA
LPA
PD1
PD2
SU
H
CO1
CH
CL
ASU
AH
ACO1
ACH
ACL
CPPW
Table 21. EPM3128A Internal Timing Parameters (Part 2 of 2)
Table 22. EPM3256A External Timing Parameters
Symbol
Register setup time
Register hold time
Register delay
Combinatorial delay
Array clock delay
Register enable time
Global control delay
Register preset time
Register clear time
PIA delay
Low–power adder
Input to non–registered
output
I/O input to non–registered
output
Global clock setup time
Global clock hold time
Global clock to output
delay
Global clock high time
Global clock low time
Array clock setup time
Array clock hold time
Array clock to output delay C1 = 35 pF
Array clock high time
Array clock low time
Minimum pulse width for
clear and preset
Parameter
Parameter
(2)
(5)
C1 = 35 pF
C1 = 35 pF
(2)
(2)
C1 = 35 pF
(2)
(2)
(3)
Conditions
Conditions
(2)
(2)
(2)
Note (1)
Min
1.4
0.6
Min
5.2
0.0
1.0
3.0
3.0
2.7
0.3
1.0
3.0
3.0
3.0
–5
Max
0.8
0.5
1.2
0.7
1.1
1.4
1.4
1.4
4.0
–7
Note (1)
Speed Grade
Max
Speed Grade
7.5
7.5
4.8
7.3
Min
2.1
1.0
–7
Max
1.2
0.9
1.7
1.0
1.6
2.0
2.0
2.0
4.0
Min
6.9
0.0
1.0
4.0
4.0
3.6
0.5
1.0
4.0
4.0
4.0
Min
2.9
1.3
–10
Altera Corporation
–10
Max
6.4
9.7
10
10
Max
1.6
1.3
2.2
1.3
2.0
2.7
2.7
2.6
5.0
Unit
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns