ADSP-2101BPZ-100 Analog Devices Inc, ADSP-2101BPZ-100 Datasheet - Page 28

• Manufacturer Part Number: ADSP-2101BPZ-100
• Description: IC DSP SLG 16BIT 25MHZ 68-PLCC
• Manufacturer: Analog Devices Inc
• Series: ADSP-21xxr
• Type: Fixed Pointr

Specifications of ADSP-2101BPZ-100

• Interface: Synchronous Serial Port (SSP)
• Clock Rate: 25MHz
• Non-volatile Memory: External
• On-chip Ram: 6kB
• Voltage - I/o: 5.00V
• Voltage - Core: 5.00V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 68-PLCC
• No. Of Bits: 16
• Frequency: 25MHz
• Core Supply Voltage: 5.5V
• No. Of Mips: 25
• Supply Voltage Range: 4.5V To 5.5V
• Operating Temperature Range: -40°C To +85°C
• Digital Ic Case Style: PLCC
• Embedded Interface Type: Host Port
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

ADSP-21xx
SPECIFICATIONS (ADSP-2103/2162/2164)
TEST CONDITIONS
Figure 26 shows voltage reference levels for ac measurements.
Figure 26. Voltage Reference Levels for AC Measurements
(Except Output Enable/Disable)
Output Disable Time
Output pins are considered to be disabled when they have
stopped driving and started a transition from the measured
output high or low voltage to a high impedance state. The
output disable time (t
t
interval from when a reference signal reaches a high or low
voltage level to when the output voltages have changed by 0.5 V
from the measured output high or low voltage.
DECAY
, as shown in Figure 27. The time t
OUTPUT
INPUT
V
V
DIS
OH
OL
(MEASURED)
(MEASURED)
) is the difference of t
REFERENCE
SIGNAL
OUTPUT
Figure 28. Equivalent Device Loading for AC Measurements
(Except Output Enable/Disable)
t
DECAY
OUTPUT STOPS
OUTPUT
t
MEASURED
t
DIS
V
MEASURED
DRIVING
V
DD
2
DD
2
PIN
TO
MEASURED
Figure 27. Output Enable/Disable
50pF
V
V
OH
OL
is the
(MEASURED) – 0.5V
(MEASURED) +0.5V
and
–28–
I
I
OL
OH
HIGH-IMPEDANCE STATE.
TEST CONDITIONS CAUSE
THIS VOLTAGE LEVEL TO BE
APPROXIMATELY 1.5V.
The decay time, t
C
approximated by the following equation:
from which
is calculated. If multiple pins (such as the data bus) are dis-
abled, the measurement value is that of the last pin to stop
driving.
Output Enable Time
Output pins are considered to be enabled when they have made
a transition from a high-impedance state to when they start
driving. The output enable time (t
when a reference signal reaches a high or low voltage level to
when the output has reached a specified high or low trip point,
as shown in Figure 27. If multiple pins (such as the data bus)
are enabled, the measurement value is that of the first pin to
start driving.
L
, and the current load, i
OUTPUT STARTS
1.0V
2.0V
DRIVING
t
ENA
V
DD
2
DECAY
t
DIS
t
DECAY
, is dependent on the capacitative load,
= t
V
V
OH
OL
L
MEASURED
, on the output pin. It can be
(MEASURED)
(MEASURED)
C
L
E NA
i
– t
0.5 V
L
) is the interval from
DECAY
REV. B