IC ACEX 1K FPGA 10K 100-TQFP

EP1K10TC100-3

Manufacturer Part NumberEP1K10TC100-3
DescriptionIC ACEX 1K FPGA 10K 100-TQFP
ManufacturerAltera
SeriesACEX-1K®
EP1K10TC100-3 datasheet
 

Specifications of EP1K10TC100-3

Number Of Logic Elements/cells576Number Of Labs/clbs72
Total Ram Bits12288Number Of I /o66
Number Of Gates56000Voltage - Supply2.375 V ~ 2.625 V
Mounting TypeSurface MountOperating Temperature0°C ~ 70°C
Package / Case100-TQFP, 100-VQFPLead Free Status / RoHS StatusContains lead / RoHS non-compliant
Other names544-1027  
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ACEX 1K Programmable Logic Device Family Data Sheet
EABs can be used to implement synchronous RAM, which is easier to use
than asynchronous RAM. A circuit using asynchronous RAM must
generate the RAM write enable signal, while ensuring that its data and
address signals meet setup and hold time specifications relative to the
write enable signal. In contrast, the EAB’s synchronous RAM generates its
own write enable signal and is self-timed with respect to the input or write
clock. A circuit using the EAB’s self-timed RAM must only meet the setup
and hold time specifications of the global clock.
When used as RAM, each EAB can be configured in any of the following
sizes: 256 16; 512 8; 1,024
EAB memory configurations.
Figure 5. ACEX 1K EAB Memory Configurations
256
16
Larger blocks of RAM are created by combining multiple EABs. For
example, two 256 16 RAM blocks can be combined to form a 256 32
block, and two 512 8 RAM blocks can be combined to form a
512 16 block.
Figure 6. Examples of Combining ACEX 1K EABs
256
16
256
16
12
4; or 2,048 2.
512
8
Figure 6
shows examples of multiple EAB combination.
256
32
Figure 5
shows the ACEX 1K
2,048 2
1,024 4
512
16
512
8
512
8
Altera Corporation