IC ACEX 1K FPGA 10K 100-TQFP

EP1K10TC100-3

Manufacturer Part NumberEP1K10TC100-3
DescriptionIC ACEX 1K FPGA 10K 100-TQFP
ManufacturerAltera
SeriesACEX-1K®
EP1K10TC100-3 datasheet
 

Specifications of EP1K10TC100-3

Number Of Logic Elements/cells576Number Of Labs/clbs72
Total Ram Bits12288Number Of I /o66
Number Of Gates56000Voltage - Supply2.375 V ~ 2.625 V
Mounting TypeSurface MountOperating Temperature0°C ~ 70°C
Package / Case100-TQFP, 100-VQFPLead Free Status / RoHS StatusContains lead / RoHS non-compliant
Other names544-1027  
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Figure 16. ACEX 1K Row-to-IOE Connections
Row FastTrack
Interconnect
n
Note:
(1)
The values for m and n are shown in
Altera Corporation
ACEX 1K Programmable Logic Device Family Data Sheet
Row-to-IOE Connections
When an IOE is used as an input signal, it can drive two separate row
channels. The signal is accessible by all LEs within that row. When an IOE
is used as an output, the signal is driven by a multiplexer that selects a
signal from the row channels. Up to eight IOEs connect to each side of
each row channel (see
Figure
Note (1)
m
n
n
m
Each IOE is driven by an
m-to-1 multiplexer.
Each IOE can drive two
row channels.
Table
8.
Table 8
lists the ACEX 1K row-to-IOE interconnect resources.
Table 8. ACEX 1K Row-to-IOE Interconnect Resources
Device
Channels per Row (n)
EP1K10
EP1K30
EP1K50
EP1K100
16).
IOE1
IOE8
Row Channels per Pin (m)
144
216
216
312
13
18
27
27
39
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