IC ACEX 1K FPGA 10K 100-TQFP

EP1K10TC100-3

Manufacturer Part NumberEP1K10TC100-3
DescriptionIC ACEX 1K FPGA 10K 100-TQFP
ManufacturerAltera
SeriesACEX-1K®
EP1K10TC100-3 datasheet
 


Specifications of EP1K10TC100-3

Number Of Logic Elements/cells576Number Of Labs/clbs72
Total Ram Bits12288Number Of I /o66
Number Of Gates56000Voltage - Supply2.375 V ~ 2.625 V
Mounting TypeSurface MountOperating Temperature0°C ~ 70°C
Package / Case100-TQFP, 100-VQFPLead Free Status / RoHS StatusContains lead / RoHS non-compliant
Other names544-1027  
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ACEX 1K Programmable Logic Device Family Data Sheet
Table 21. ACEX 1K Device Capacitance
Symbol
Parameter
C
Input capacitance
IN
C
Input capacitance on
INCLK
dedicated clock pin
C
Output capacitance
OUT
Notes to tables:
(1)
See the
Operating Requirements for Altera Devices Data
(2)
Minimum DC input voltage is –0.5 V. During transitions, the inputs may undershoot to –2.0 V for input currents
less than 100 mA and periods shorter than 20 ns.
(3)
Numbers in parentheses are for industrial- and extended-temperature-range devices.
(4)
Maximum V
rise time is 100 ms, and V
CC
(5)
All pins, including dedicated inputs, clock, I/O, and JTAG pins, may be driven before V
powered.
(6)
Typical values are for T
= 25 C, V
A
(7)
These values are specified under the ACEX 1K Recommended Operating Conditions shown in Table 19 on page 46.
(8)
The ACEX 1K input buffers are compatible with 2.5-V, 3.3-V (LVTTL and LVCMOS), and 5.0-V TTL and CMOS
signals. Additionally, the input buffers are 3.3-V PCI compliant when V
shown in
Figure
22.
(9)
The I
parameter refers to high-level TTL, PCI, or CMOS output current.
OH
(10) The I
parameter refers to low-level TTL, PCI, or CMOS output current. This parameter applies to open-drain pins
OL
as well as output pins.
(11) This value is specified for normal device operation. The value may vary during power-up.
(12) This parameter applies to -1 speed grade commercial temperature devices and -2 speed grade industrial and
extended temperature devices.
(13) Pin pull-up resistance values will be lower if the pin is driven higher than V
(14) Capacitance is sample-tested only.
48
Note (14)
Conditions
V
= 0 V, f = 1.0 MHz
IN
V
= 0 V, f = 1.0 MHz
IN
V
= 0 V, f = 1.0 MHz
OUT
Sheet.
must rise monotonically.
CC
= 2.5 V, and V
= 2.5 V or 3.3 V.
CCINT
CCIO
Min
Max
10
12
10
and V
CCINT
CCIO
and V
meet the relationship
CCIO
CCINT
by an external source.
CCIO
Altera Corporation
Unit
pF
pF
pF
are