IC ACEX 1K FPGA 10K 100-TQFP

EP1K10TC100-3

Manufacturer Part NumberEP1K10TC100-3
DescriptionIC ACEX 1K FPGA 10K 100-TQFP
ManufacturerAltera
SeriesACEX-1K®
EP1K10TC100-3 datasheet
 


Specifications of EP1K10TC100-3

Number Of Logic Elements/cells576Number Of Labs/clbs72
Total Ram Bits12288Number Of I /o66
Number Of Gates56000Voltage - Supply2.375 V ~ 2.625 V
Mounting TypeSurface MountOperating Temperature0°C ~ 70°C
Package / Case100-TQFP, 100-VQFPLead Free Status / RoHS StatusContains lead / RoHS non-compliant
Other names544-1027  
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Table 25. EAB Timing Macroparameters
Symbol
t
EAB address access delay
EABAA
t
EAB asynchronous read cycle time
EABRCCOMB
t
EAB synchronous read cycle time
EABRCREG
t
EAB write pulse width
EABWP
t
EAB asynchronous write cycle time
EABWCCOMB
t
EAB synchronous write cycle time
EABWCREG
t
EAB data-in to data-out valid delay
EABDD
t
EAB clock-to-output delay when using output registers
EABDATACO
t
EAB data/address setup time before clock when using input register
EABDATASU
t
EAB data/address hold time after clock when using input register
EABDATAH
t
EAB WE setup time before clock when using input register
EABWESU
t
EAB WE hold time after clock when using input register
EABWEH
t
EAB data setup time before falling edge of write pulse when not using input
EABWDSU
registers
t
EAB data hold time after falling edge of write pulse when not using input
EABWDH
registers
t
EAB address setup time before rising edge of write pulse when not using
EABWASU
input registers
t
EAB address hold time after falling edge of write pulse when not using input
EABWAH
registers
t
EAB write enable to data output valid delay
EABWO
Altera Corporation
ACEX 1K Programmable Logic Device Family Data Sheet
Notes
(1),
(6)
Parameter
Conditions
13
57