IC ACEX 1K FPGA 10K 100-TQFP

EP1K10TC100-3

Manufacturer Part NumberEP1K10TC100-3
DescriptionIC ACEX 1K FPGA 10K 100-TQFP
ManufacturerAltera
SeriesACEX-1K®
EP1K10TC100-3 datasheet
 


Specifications of EP1K10TC100-3

Number Of Logic Elements/cells576Number Of Labs/clbs72
Total Ram Bits12288Number Of I /o66
Number Of Gates56000Voltage - Supply2.375 V ~ 2.625 V
Mounting TypeSurface MountOperating Temperature0°C ~ 70°C
Package / Case100-TQFP, 100-VQFPLead Free Status / RoHS StatusContains lead / RoHS non-compliant
Other names544-1027  
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ACEX 1K Programmable Logic Device Family Data Sheet
Table 26. Interconnect Timing Microparameters
Symbol
t
Delay from dedicated input pin to IOE control input
DIN2IOE
t
Delay from dedicated input pin to LE or EAB control input
DIN2LE
t
Delay from dedicated input or clock to LE or EAB data
DIN2DATA
t
Delay from dedicated clock pin to IOE clock
DCLK2IOE
t
Delay from dedicated clock pin to LE or EAB clock
DCLK2LE
t
Routing delay for an LE driving another LE in the same LAB
SAMELAB
t
Routing delay for a row IOE, LE, or EAB driving a row IOE, LE, or EAB in the
SAMEROW
same row
t
Routing delay for an LE driving an IOE in the same column
SAMECOLUMN
t
Routing delay for a column IOE, LE, or EAB driving an LE or EAB in a different
DIFFROW
row
t
Routing delay for a row IOE or EAB driving an LE or EAB in a different row
TWOROWS
t
Routing delay for an LE driving a control signal of an IOE via the peripheral
LEPERIPH
control bus
t
Routing delay for the carry-out signal of an LE driving the carry-in signal of a
LABCARRY
different LE in a different LAB
t
Routing delay for the cascade-out signal of an LE driving the cascade-in
LABCASC
signal of a different LE in a different LAB
Notes to tables:
(1)
Microparameters are timing delays contributed by individual architectural elements. These parameters cannot be
measured explicitly.
(2)
Operating conditions: V
CCIO
(3)
Operating conditions: V
CCIO
(4)
Operating conditions: V
CCIO
(5)
Because the RAM in the EAB is self-timed, this parameter can be ignored when the WE signal is registered.
(6)
EAB macroparameters are internal parameters that can simplify predicting the behavior of an EAB at its boundary;
these parameters are calculated by summing selected microparameters.
(7)
These parameters are worst-case values for typical applications. Post-compilation timing simulation and timing
analysis are required to determine actual worst-case performance.
58
Note (1)
Parameter
= 3.3 V ± 10% for commercial or industrial and extended use in ACEX 1K devices
= 2.5 V ± 5% for commercial or industrial and extended use in ACEX 1K devices.
= 2.5 V or 3.3 V.
Conditions
(7)
(7)
(7)
(7)
(7)
(7)
(7)
(7)
(7)
(7)
(7)
Altera Corporation