IC CYCLONE FPGA 2910 LE 100-TQFP

 

EP1C3T100I7N

Manufacturer Part NumberEP1C3T100I7N
DescriptionIC CYCLONE FPGA 2910 LE 100-TQFP
ManufacturerAltera
SeriesCyclone®
EP1C3T100I7N datasheets

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Specifications of EP1C3T100I7N

Number Of Logic Elements/cells2910Number Of Labs/clbs291
Total Ram Bits59904Number Of I /o65
Voltage - Supply1.425 V ~ 1.575 VMounting TypeSurface Mount
Operating Temperature-40°C ~ 100°CPackage / Case100-TQFP, 100-VQFP
Family NameCyclone®Number Of Logic Blocks/elements2910
# I/os (max)65Frequency (max)320.1MHz
Process Technology0.13um (CMOS)Operating Supply Voltage (typ)1.5V
Logic Cells2910Ram Bits59904
Operating Supply Voltage (min)1.425VOperating Supply Voltage (max)1.575V
Operating Temp Range-40C to 100COperating Temperature ClassificationIndustrial
MountingSurface MountPin Count100
Package TypeTQFPLead Free Status / RoHS StatusLead free / RoHS Compliant
Number Of Gates-Other names544-1663
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Figure 2–10. LUT Chain and Register Chain Interconnects
The C4 interconnects span four LABs or M4K blocks up or down from a
source LAB. Every LAB has its own set of C4 interconnects to drive either
up or down.
LAB in a column. The C4 interconnects can drive and be driven by all
types of architecture blocks, including PLLs, M4K memory blocks, and
column and row IOEs. For LAB interconnection, a primary LAB or its
LAB neighbor can drive a given C4 interconnect. C4 interconnects can
drive each other to extend their range as well as drive row interconnects
for column-to-column connections.
Altera Corporation
May 2008
Local Interconnect
Routing Among LEs
in the LAB
LE 1
LUT Chain
Routing to
Adjacent LE
LE 2
Local
LE 3
Interconnect
LE 4
LE 5
LE 6
LE 7
LE 8
LE 9
LE 10
Figure 2–11
shows the C4 interconnect connections from a
MultiTrack Interconnect
Register Chain
Routing to Adjacent
LE's Register Input
2–15
Preliminary

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