EP1C3T100I7N | |
|---|---|
| Manufacturer Part Number | EP1C3T100I7N |
| Description | IC CYCLONE FPGA 2910 LE 100-TQFP |
| Manufacturer | Altera |
| Series | Cyclone® |
| EP1C3T100I7N datasheets |
|
Availability: In stock
International delivery:
Warranty: 60 days
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Specifications of EP1C3T100I7N | |||
|---|---|---|---|
| Number Of Logic Elements/cells | 2910 | Number Of Labs/clbs | 291 |
| Total Ram Bits | 59904 | Number Of I /o | 65 |
| Voltage - Supply | 1.425 V ~ 1.575 V | Mounting Type | Surface Mount |
| Operating Temperature | -40°C ~ 100°C | Package / Case | 100-TQFP, 100-VQFP |
| Family Name | Cyclone® | Number Of Logic Blocks/elements | 2910 |
| # I/os (max) | 65 | Frequency (max) | 320.1MHz |
| Process Technology | 0.13um (CMOS) | Operating Supply Voltage (typ) | 1.5V |
| Logic Cells | 2910 | Ram Bits | 59904 |
| Operating Supply Voltage (min) | 1.425V | Operating Supply Voltage (max) | 1.575V |
| Operating Temp Range | -40C to 100C | Operating Temperature Classification | Industrial |
| Mounting | Surface Mount | Pin Count | 100 |
| Package Type | TQFP | Lead Free Status / RoHS Status | Lead free / RoHS Compliant |
| Number Of Gates | - | Other names | 544-1663 |
PrevNext
Cyclone Device Handbook, Volume 1
Figure 2–18. Input/Output Clock Mode in True Dual-Port Mode
6 LAB Row Clocks
6
data
[ ]
A
D
Q
ENA
byteena
[ ]
A
D
Q
ENA
address
[ ]
D
Q
A
ENA
wren
A
D
Q
clken
A
ENA
Generator
clock
A
Notes to
Figure
2–18:
(1)
All registers shown have asynchronous clear ports.
(2)
Violating the setup or hold time on the address registers could corrupt the memory contents. This applies to both
read and write operations.
2–26
Preliminary
Notes
A
Memory Block
B
256 × 16 (2)
Data In
Data In
512 × 8
1,024 × 4
2,048 × 2
4,096 × 1
Byte Enable A
Byte Enable B
Address A
Address B
Write/Read
Write/Read
Write
Enable
Enable
Pulse
Data Out
Data Out
D
Q
Q
D
ENA
ENA
q
[ ]
q
[ ]
A
B
(1),
(2)
6
Q
D
ENA
Q
D
ENA
Q
D
ENA
Write
Q
D
Pulse
ENA
Generator
Altera Corporation
May 2008
data
[ ]
B
byteena
[ ]
B
address
[ ]
B
wren
B
clken
B
clock
B
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