EP1C3T100I7N | |
|---|---|
| Manufacturer Part Number | EP1C3T100I7N |
| Description | IC CYCLONE FPGA 2910 LE 100-TQFP |
| Manufacturer | Altera |
| Series | Cyclone® |
| EP1C3T100I7N datasheets |
|
Availability: In stock
International delivery:
Warranty: 60 days
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Specifications of EP1C3T100I7N | |||
|---|---|---|---|
| Number Of Logic Elements/cells | 2910 | Number Of Labs/clbs | 291 |
| Total Ram Bits | 59904 | Number Of I /o | 65 |
| Voltage - Supply | 1.425 V ~ 1.575 V | Mounting Type | Surface Mount |
| Operating Temperature | -40°C ~ 100°C | Package / Case | 100-TQFP, 100-VQFP |
| Family Name | Cyclone® | Number Of Logic Blocks/elements | 2910 |
| # I/os (max) | 65 | Frequency (max) | 320.1MHz |
| Process Technology | 0.13um (CMOS) | Operating Supply Voltage (typ) | 1.5V |
| Logic Cells | 2910 | Ram Bits | 59904 |
| Operating Supply Voltage (min) | 1.425V | Operating Supply Voltage (max) | 1.575V |
| Operating Temp Range | -40C to 100C | Operating Temperature Classification | Industrial |
| Mounting | Surface Mount | Pin Count | 100 |
| Package Type | TQFP | Lead Free Status / RoHS Status | Lead free / RoHS Compliant |
| Number Of Gates | - | Other names | 544-1663 |
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PrevNext
Cyclone Device Handbook, Volume 1
Advanced I/O Standard Support
Cyclone device IOEs support the following I/O standards:
■
■
■
■
■
■
■
■
■
■
Table 2–12
Table 2–12. Cyclone I/O Standards
I/O Standard
3.3-V LVTTL/LVCMOS
Single-ended
2.5-V LVTTL/LVCMOS
Single-ended
1.8-V LVTTL/LVCMOS
Single-ended
1.5-V LVCMOS
Single-ended
(1)
3.3-V PCI
Single-ended
LVDS
(2)
Differential
RSDS
(2)
Differential
SSTL-2 class I and II
Voltage-referenced
SSTL-3 class I and II
Voltage-referenced
Differential SSTL-2
(3)
Differential
Notes to
Table
2–12:
(1)
There is no megafunction support for EP1C3 devices for the PCI compiler. However, EP1C3 devices support PCI
by using the LVTTL 16-mA I/O standard and drive strength assignments in the Quartus II software. The device
requires an external diode for PCI compliance.
(2)
EP1C3 devices in the 100-pin TQFP package do not support the LVDS and RSDS I/O standards.
(3)
This I/O standard is only available on output clock pins (PLL_OUT pins). EP1C3 devices in the 100-pin package
do not support this I/O standard as it does not have PLL_OUT pins.
Cyclone devices contain four I/O banks, as shown in
banks 1 and 3 support all the I/O standards listed in
banks 2 and 4 support all the I/O standards listed in
3.3-V PCI standard. I/O banks 2 and 4 contain dual-purpose DQS, DQ,
2–52
Preliminary
3.3-V LVTTL/LVCMOS
2.5-V LVTTL/LVCMOS
1.8-V LVTTL/LVCMOS
1.5-V LVCMOS
3.3-V PCI
LVDS
RSDS
SSTL-2 class I and II
SSTL-3 class I and II
Differential SSTL-2 class II (on output clocks only)
describes the I/O standards supported by Cyclone devices.
Input Reference
Type
Voltage (V
) (V)
REF
N/A
N/A
N/A
N/A
N/A
N/A
N/A
1.25
1.5
1.25
Board
Output Supply
Termination
Voltage (V
) (V)
CCIO
Voltage (V
) (V)
TT
3.3
N/A
2.5
N/A
1.8
N/A
1.5
N/A
3.3
N/A
2.5
N/A
2.5
N/A
2.5
1.25
3.3
1.5
2.5
1.25
Figure
2–35. I/O
Table
2–12. I/O
Table 2–12
except the
Altera Corporation
May 2008
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