IC CYCLONE FPGA 2910 LE 100-TQFP

 

EP1C3T100I7N

Manufacturer Part NumberEP1C3T100I7N
DescriptionIC CYCLONE FPGA 2910 LE 100-TQFP
ManufacturerAltera
SeriesCyclone®
EP1C3T100I7N datasheets

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Specifications of EP1C3T100I7N

Number Of Logic Elements/cells2910Number Of Labs/clbs291
Total Ram Bits59904Number Of I /o65
Voltage - Supply1.425 V ~ 1.575 VMounting TypeSurface Mount
Operating Temperature-40°C ~ 100°CPackage / Case100-TQFP, 100-VQFP
Family NameCyclone®Number Of Logic Blocks/elements2910
# I/os (max)65Frequency (max)320.1MHz
Process Technology0.13um (CMOS)Operating Supply Voltage (typ)1.5V
Logic Cells2910Ram Bits59904
Operating Supply Voltage (min)1.425VOperating Supply Voltage (max)1.575V
Operating Temp Range-40C to 100COperating Temperature ClassificationIndustrial
MountingSurface MountPin Count100
Package TypeTQFPLead Free Status / RoHS StatusLead free / RoHS Compliant
Number Of Gates-Other names544-1663
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and DM pins to support a DDR SDRAM or FCRAM interface. I/O bank 1
can also support a DDR SDRAM or FCRAM interface, however, the
configuration input pins in I/O bank 1 must operate at 2.5 V. I/O bank 3
can also support a DDR SDRAM or FCRAM interface, however, all the
JTAG pins in I/O bank 3 must operate at 2.5 V.
Figure 2–35. Cyclone I/O Banks
I/O Bank 1
Also Supports
the 3.3-V PCI
I/O Standard
I/O Bank 1
Notes to
Figure
2–35:
(1)
Figure 2–35
is a top view of the silicon die.
(2)
Figure 2–35
is a graphic representation only. Refer to the pin list and the Quartus II software for exact pin locations.
Each I/O bank has its own VCCIO pins. A single device can support 1.5-V,
1.8-V, 2.5-V, and 3.3-V interfaces; each individual bank can support a
different standard with different I/O voltages. Each bank also has
dual-purpose VREF pins to support any one of the voltage-referenced
standards (e.g., SSTL-3) independently. If an I/O bank does not use
voltage-referenced standards, the V
Altera Corporation
May 2008
Notes
(1),
(2)
I/O Bank 2
All I/O Banks Support
■
3.3-V LVTTL/LVCMOS
■
2.5-V LVTTL/LVCMOS
■
1.8-V LVTTL/LVCMOS
■
1.5-V LVCMOS
■
LVDS
■
RSDS
■
SSTL-2 Class I and II
■
SSTL-3 Class I and II
Individual
Power Bus
I/O Bank 4
REF
I/O Structure
I/O Bank 3
Also Supports
the 3.3-V PCI
I/O Standard
I/O Bank 3
pins are available as user I/O pins.
2–53
Preliminary

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