IC CYCLONE FPGA 2910 LE 100-TQFP

 

EP1C3T100I7N

Manufacturer Part NumberEP1C3T100I7N
DescriptionIC CYCLONE FPGA 2910 LE 100-TQFP
ManufacturerAltera
SeriesCyclone®
EP1C3T100I7N datasheets

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Specifications of EP1C3T100I7N

Number Of Logic Elements/cells2910Number Of Labs/clbs291
Total Ram Bits59904Number Of I /o65
Voltage - Supply1.425 V ~ 1.575 VMounting TypeSurface Mount
Operating Temperature-40°C ~ 100°CPackage / Case100-TQFP, 100-VQFP
Family NameCyclone®Number Of Logic Blocks/elements2910
# I/os (max)65Frequency (max)320.1MHz
Process Technology0.13um (CMOS)Operating Supply Voltage (typ)1.5V
Logic Cells2910Ram Bits59904
Operating Supply Voltage (min)1.425VOperating Supply Voltage (max)1.575V
Operating Temp Range-40C to 100COperating Temperature ClassificationIndustrial
MountingSurface MountPin Count100
Package TypeTQFPLead Free Status / RoHS StatusLead free / RoHS Compliant
Number Of Gates-Other names544-1663
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Page 69/106

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Multiple Cyclone devices can be configured in any of the three
configuration schemes by connecting the configuration enable (nCE) and
configuration enable output (nCEO) pins on each device.
Table 3–5. Data Sources for Configuration
Active serial
Passive serial (PS)
JTAG
Referenced
This chapter references the following document:
Documents
■
■
Document
Table 3–6
Revision History
Table 3–6. Document Revision History
Date and
Document
Version
May 2008
Minor textual and style changes. Added
v1.4
Documents”
section.
January 2007
●
Added document revision history.
v1.3
●
Updated handpara note below
August 2005
Minor updates.
V1.2
February 2005
Updated JTAG chain limits. Added information concerning test
V1.1
vectors.
May 2003 v1.0
Added document to Cyclone Device Handbook.
Altera Corporation
May 2008
Configuration Scheme
Low-cost serial configuration device
Enhanced or EPC2 configuration device,
MasterBlaster or ByteBlasterMV download cable,
or serial data source
MasterBlaster or ByteBlasterMV download cable
or a microprocessor with a Jam or JBC file
AN 39: IEEE Std. 1149.1 (JTAG) Boundary-Scan Testing in Altera Devices
Jam Programming & Test Language Specification
shows the revision history for this chapter.
Changes Made
“Referenced
Table
3–4.
Referenced Documents
Data Source
Summary of Changes
—
—
—
—
—
3–7
Preliminary

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