IC CYCLONE FPGA 2910 LE 100-TQFP

 

EP1C3T100I7N

Manufacturer Part NumberEP1C3T100I7N
DescriptionIC CYCLONE FPGA 2910 LE 100-TQFP
ManufacturerAltera
SeriesCyclone®
EP1C3T100I7N datasheets

Availability: In stock

International delivery:

Warranty: 60 days

Shipping & payment terms

Added to cart

Select quantity

 

Specifications of EP1C3T100I7N

Number Of Logic Elements/cells2910Number Of Labs/clbs291
Total Ram Bits59904Number Of I /o65
Voltage - Supply1.425 V ~ 1.575 VMounting TypeSurface Mount
Operating Temperature-40°C ~ 100°CPackage / Case100-TQFP, 100-VQFP
Family NameCyclone®Number Of Logic Blocks/elements2910
# I/os (max)65Frequency (max)320.1MHz
Process Technology0.13um (CMOS)Operating Supply Voltage (typ)1.5V
Logic Cells2910Ram Bits59904
Operating Supply Voltage (min)1.425VOperating Supply Voltage (max)1.575V
Operating Temp Range-40C to 100COperating Temperature ClassificationIndustrial
MountingSurface MountPin Count100
Package TypeTQFPLead Free Status / RoHS StatusLead free / RoHS Compliant
Number Of Gates-Other names544-1663
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
Page 81
82
Page 82
83
Page 83
84
Page 84
85
Page 85
86
Page 86
87
Page 87
88
Page 88
89
Page 89
90
Page 90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
Page 83/106

Download datasheet (2Mb)Embed
PrevNext
Table 4–24. Routing Delay Internal Timing Microparameter Descriptions
t
R4
t
C4
t
LOCAL
Figure 4–1
shown in
Figure 4–1. Dual-Port RAM Timing Microparameter Waveform
wrclock
t
WEREH
wren
an-1
an
wraddress
t
DATAH
din-1
data-in
din
t
DATASU
rdclock
t
WERESU
rden
rdaddress
bn
doutn-1
reg_data-out
doutn-2
doutn-1
unreg_data-out
Altera Corporation
May 2008
Symbol
Delay for an R4 line with average loading; covers a distance
of four LAB columns
Delay for an C4 line with average loading; covers a distance
of four LAB rows
Local interconnect delay
shows the memory waveforms for the M4K timing parameters
Table
4–23.
a0
a1
a2
t
WEREH
t
RC
b0
b1
t
DATACO1
doutn
t
DATACO2
doutn
dout0
Timing Model
Parameter
t
WERESU
t
t
WADDRSU
WADDRH
a3
a4
a5
a6
din4
din5
din6
b2
b3
dout0
4–13
Preliminary

Related parts for EP1C3T100I7N

Part Number DescriptionManufacturer Datasheet
  EP1C3T100C8N Altera Corporation
  EP1C3T100I6 Altera Corporation
  EP1C3T100I6N Altera Corporation
  EP1C3T100I8 Altera Corporation
  EP1C3T100I8N Altera Corporation
EP1C3T100C7  EP1C3T100C7 IC CYCLONE FPGA 2910 LE 100-TQFP Altera
EP1C3T100C6N  EP1C3T100C6N IC CYCLONE FPGA 2910 LE 100-TQFP Altera
EP1C3T100I7  EP1C3T100I7 IC CYCLONE FPGA 2910 LE 100-TQFP Altera
EP1C3T100C6  EP1C3T100C6 IC CYCLONE FPGA 2910 LE 100-TQFP Altera
EP1C3T100C8  EP1C3T100C8 IC CYCLONE FPGA 2910 LE 100-TQFP Altera
EP1C3T100C7N  EP1C3T100C7N IC CYCLONE FPGA 2910 LE 100-TQFP Altera
EP1C3T100A8N  EP1C3T100A8N IC CYCLONE FPGA 2910 LE 100-TQFP Altera
  EP1C3T144C8 Altera Corporation
  EP1C3T144I6 Altera Corporation
  EP1C3T144I6N Altera Corporation