EPF10K30RI208-4 Altera, EPF10K30RI208-4 Datasheet - Page 10

IC FLEX 10K FPGA 30K 208-RQFP

EPF10K30RI208-4

Manufacturer Part Number
EPF10K30RI208-4
Description
IC FLEX 10K FPGA 30K 208-RQFP
Manufacturer
Altera
Series
FLEX-10K®r
Datasheet

Specifications of EPF10K30RI208-4

Number Of Logic Elements/cells
1728
Number Of Labs/clbs
216
Total Ram Bits
12288
Number Of I /o
147
Number Of Gates
69000
Voltage - Supply
4.5 V ~ 5.5 V
Mounting Type
Surface Mount
Operating Temperature
-40°C ~ 100°C
Package / Case
208-RQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Other names
544-2233
FLEX 10K Embedded Programmable Logic Device Family Data Sheet
Logic functions are implemented by programming the EAB with a read-
only pattern during configuration, creating a large LUT. With LUTs,
combinatorial functions are implemented by looking up the results, rather
than by computing them. This implementation of combinatorial functions
can be faster than using algorithms implemented in general logic, a
performance advantage that is further enhanced by the fast access times
of EABs. The large capacity of EABs enables designers to implement
complex functions in one logic level without the routing delays associated
with linked LEs or field-programmable gate array (FPGA) RAM blocks.
For example, a single EAB can implement a 4 4 multiplier with eight
inputs and eight outputs. Parameterized functions such as LPM functions
can automatically take advantage of the EAB.
The EAB provides advantages over FPGAs, which implement on-board
RAM as arrays of small, distributed RAM blocks. These FPGA RAM
blocks contain delays that are less predictable as the size of the RAM
increases. In addition, FPGA RAM blocks are prone to routing problems
because small blocks of RAM must be connected together to make larger
blocks. In contrast, EABs can be used to implement large, dedicated blocks
of RAM that eliminate these timing and routing concerns.
EABs can be used to implement synchronous RAM, which is easier to use
than asynchronous RAM. A circuit using asynchronous RAM must
generate the RAM write enable (WE) signal, while ensuring that its data
and address signals meet setup and hold time specifications relative to the
WE signal. In contrast, the EAB’s synchronous RAM generates its own WE
signal and is self-timed with respect to the global clock. A circuit using the
EAB’s self-timed RAM need only meet the setup and hold time
specifications of the global clock.
When used as RAM, each EAB can be configured in any of the following
sizes: 256 8, 512
4, 1,024 2, or 2,048
1. See
Figure
2.
Figure 2. EAB Memory Configurations
2,048 1
256
8
512
4
1,024 2
10
Altera Corporation

Related parts for EPF10K30RI208-4