EP2S90F1020I4N

Manufacturer Part NumberEP2S90F1020I4N
DescriptionIC STRATIX II FPGA 90K 1020-FBGA
ManufacturerAltera
SeriesStratix® II
EP2S90F1020I4N datasheet
 

Specifications of EP2S90F1020I4N

Number Of Logic Elements/cells90960Number Of Labs/clbs4548
Total Ram Bits4520488Number Of I /o758
Voltage - Supply1.15 V ~ 1.25 VMounting TypeSurface Mount
Operating Temperature-40°C ~ 100°CPackage / Case1020-FBGA
Family NameStratix IINumber Of Logic Blocks/elements90960
# I/os (max)758Frequency (max)711.24MHz
Process Technology90nm (CMOS)Operating Supply Voltage (typ)1.2V
Logic Cells90960Ram Bits4520488
Operating Supply Voltage (min)1.15VOperating Supply Voltage (max)1.25V
Operating Temp Range-40C to 100COperating Temperature ClassificationIndustrial
MountingSurface MountPin Count1020
Package TypeFC-FBGALead Free Status / RoHS StatusLead free / RoHS Compliant
Number Of Gates-Other names544-1920
EP2S90F1020I4N
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
Page 111
112
Page 112
113
Page 113
114
Page 114
115
Page 115
116
Page 116
117
Page 117
118
Page 118
119
Page 119
120
Page 120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
Page 111/238

Download datasheet (3Mb)Embed
PrevNext
Figure 2–61. Fast PLL & Channel Layout in the EP2S60 to EP2S180 Devices
Fast
PLL 7
2
4
LVDS
DPA
Clock
Clock
4
2
Fast
PLL 1
Fast
PLL 2
2
LVDS
DPA
Clock
Clock
4
2
Fast
PLL 8
Note to
Figure
2–61:
(1)
See
Tables 2–22
through
2–26
for the number of channels each device supports.
Altera Corporation
May 2007
DPA
Quadrant
Quadrant
Clock
DPA
Quadrant
Quadrant
Clock
Stratix II Device Handbook, Volume 1
Stratix II Architecture
Note (1)
Fast
PLL 10
2
4
LVDS
Clock
4
2
Fast
PLL 4
Fast
PLL 3
2
LVDS
Clock
4
2
Fast
PLL 9
2–103