EP2S90F1020I4N | |
|---|---|
| Manufacturer Part Number | EP2S90F1020I4N |
| Description | IC STRATIX II FPGA 90K 1020-FBGA |
| Manufacturer | Altera |
| Series | Stratix® II |
| EP2S90F1020I4N datasheets |
|
Availability: In stock
International delivery:
Warranty: 60 days
×
- We provide standard 60-days warranty for all parts. If warranty differs we always mention it beforehand. In case of return we cover shipping costs.
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Specifications of EP2S90F1020I4N | |||
|---|---|---|---|
| Number Of Logic Elements/cells | 90960 | Number Of Labs/clbs | 4548 |
| Total Ram Bits | 4520488 | Number Of I /o | 758 |
| Voltage - Supply | 1.15 V ~ 1.25 V | Mounting Type | Surface Mount |
| Operating Temperature | -40°C ~ 100°C | Package / Case | 1020-FBGA |
| Family Name | Stratix II | Number Of Logic Blocks/elements | 90960 |
| # I/os (max) | 758 | Frequency (max) | 711.24MHz |
| Process Technology | 90nm (CMOS) | Operating Supply Voltage (typ) | 1.2V |
| Logic Cells | 90960 | Ram Bits | 4520488 |
| Operating Supply Voltage (min) | 1.15V | Operating Supply Voltage (max) | 1.25V |
| Operating Temp Range | -40C to 100C | Operating Temperature Classification | Industrial |
| Mounting | Surface Mount | Pin Count | 1020 |
| Package Type | FC-FBGA | Lead Free Status / RoHS Status | Lead free / RoHS Compliant |
| Number Of Gates | - | Other names | 544-1920 EP2S90F1020I4N |
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PrevNext
Operating Conditions
Table 5–4. Stratix II Device DC Operating Conditions (Part 2 of 2)
Symbol
Parameter
I
V
supply current
CCI00
CCIO
(standby)
(4)
R
Value of I/O pin pull-up
CONF
resistor before and
during configuration
Recommended value of
I/O pin external
pull-down resistor before
and during configuration
Notes to
Table
5–4:
(1)
Typical values are for T
= 25°C, V
A
(2)
This value is specified for normal device operation. The value may vary during power-up. This applies for all
V
settings (3.3, 2.5, 1.8, and 1.5 V).
CCIO
(3)
Maximum values depend on the actual T
Estimator (available at www.altera.com) or the Quartus II PowerPlay Power Analyzer feature for maximum
values. See the section
“Power Consumption” on page 5–20
(4)
Pin pull-up resistance values are lower if an external source drives the pin higher than V
I/O Standard Specifications
Tables 5–5
specifications.
Table 5–5. LVTTL Specifications (Part 1 of 2)
Symbol
Parameter
V
(1)
Output supply voltage
CCIO
V
High-level input voltage
I H
V
Low-level input voltage
IL
V
High-level output voltage
OH
5–4
Stratix II Device Handbook, Volume 1
Conditions
Minimum Typical Maximum Unit
V
= ground, no
EP2S15
I
load, no toggling
EP2S30
inputs
EP2S60
T
= 25° C
J
EP2S90
EP2S130
EP2S180
Vi = 0; V
= 3.3 V
CCIO
Vi = 0; V
= 2.5 V
CCIO
Vi = 0; V
= 1.8 V
CCIO
Vi = 0; V
= 1.5 V
CCIO
Vi = 0; V
= 1.2 V
CCIO
= 1.2 V, and V
= 1.5 V, 1.8 V, 2.5 V, and 3.3 V.
CCINT
CCIO
and design utilization. See the Excel-based PowerPlay Early Power
J
for more information.
through
5–32
show the Stratix II device family I/O standard
Conditions
I
= –4 mA
(2)
OH
Note (1)
(3)
4.0
mA
(3)
4.0
mA
4.0
(3)
mA
(3)
4.0
mA
(3)
4.0
mA
4.0
(3)
mA
10
25
50
kΩ
15
35
70
kΩ
30
50
100
kΩ
40
75
150
kΩ
50
90
170
kΩ
1
2
kΩ
.
CCIO
Minimum
Maximum
Unit
3.135
3.465
V
1.7
4.0
V
–0.3
0.8
V
2.4
V
Altera Corporation
April 2011
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