EP2S90F1020I4N Altera, EP2S90F1020I4N Datasheet - Page 19

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EP2S90F1020I4N

Manufacturer Part Number
EP2S90F1020I4N
Description
IC STRATIX II FPGA 90K 1020-FBGA
Manufacturer
Altera
Series
Stratix® IIr
Datasheet

Specifications of EP2S90F1020I4N

Number Of Logic Elements/cells
90960
Number Of Labs/clbs
4548
Total Ram Bits
4520488
Number Of I /o
758
Voltage - Supply
1.15 V ~ 1.25 V
Mounting Type
Surface Mount
Operating Temperature
-40°C ~ 100°C
Package / Case
1020-FBGA
Family Name
Stratix II
Number Of Logic Blocks/elements
90960
# I/os (max)
758
Frequency (max)
711.24MHz
Process Technology
90nm (CMOS)
Operating Supply Voltage (typ)
1.2V
Logic Cells
90960
Ram Bits
4520488
Operating Supply Voltage (min)
1.15V
Operating Supply Voltage (max)
1.25V
Operating Temp Range
-40C to 100C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
1020
Package Type
FC-FBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of Gates
-
Lead Free Status / Rohs Status
Compliant
Other names
544-1920
EP2S90F1020I4N
Figure 2–7. ALM in Normal Mode
dataf0
4-Input
datae0
datac
LUT
dataa
datab
4-Input
datad
datae1
LUT
dataf1
dataf0
datae0
5-Input
datac
LUT
dataa
datab
datad
3-Input
datae1
LUT
dataf1
dataf0
datae0
5-Input
datac
LUT
dataa
datab
datad
4-Input
datae1
LUT
dataf1
Note to
Figure
2–7:
(1)
Combinations of functions with fewer inputs than those shown are also supported. For example, combinations of
functions with the following number of inputs are supported: 4 and 3, 3 and 3, 3 and 2, 5 and 2, etc.
The normal mode provides complete backward compatibility with four-
input LUT architectures. Two independent functions of four inputs or less
can be implemented in one Stratix II ALM. In addition, a five-input
function and an independent three-input function can be implemented
without sharing inputs.
Altera Corporation
May 2007
Note (1)
dataf0
datae0
combout0
datac
dataa
datab
combout1
datad
datae1
dataf1
dataf0
combout0
datae0
dataa
datab
datac
datad
combout1
dataf0
datae0
dataa
datab
datac
datad
combout0
combout1
datae1
dataf1
Stratix II Architecture
5-Input
combout0
LUT
5-Input
combout1
LUT
6-Input
combout0
LUT
6-Input
combout0
LUT
6-Input
combout1
LUT
Stratix II Device Handbook, Volume 1
2–11

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