EP1K10TC100-2 Altera, EP1K10TC100-2 Datasheet - Page 5

IC ACEX 1K FPGA 10K 100-TQFP

EP1K10TC100-2

Manufacturer Part Number
EP1K10TC100-2
Description
IC ACEX 1K FPGA 10K 100-TQFP
Manufacturer
Altera
Series
ACEX-1K®r
Datasheet

Specifications of EP1K10TC100-2

Number Of Logic Elements/cells
576
Number Of Labs/clbs
72
Total Ram Bits
12288
Number Of I /o
66
Number Of Gates
56000
Voltage - Supply
2.375 V ~ 2.625 V
Mounting Type
Surface Mount
Operating Temperature
0°C ~ 70°C
Package / Case
100-TQFP, 100-VQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant

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Altera Corporation
16-bit, 8-tap parallel finite impulse response (FIR)
filter
8-bit, 512-point Fast Fourier transform (FFT)
function
a16450 universal asynchronous
receiver/transmitter (UART)
Table 5. ACEX 1K Device Performance for Complex Designs
Application
Table 5
These designs are available as Altera MegaCore
Each ACEX 1K device contains an embedded array and a logic array. The
embedded array is used to implement a variety of memory functions or
complex logic functions, such as digital signal processing (DSP), wide
data-path manipulation, microcontroller applications, and data-
transformation functions. The logic array performs the same function as
the sea-of-gates in the gate array and is used to implement general logic
such as counters, adders, state machines, and multiplexers. The
combination of embedded and logic arrays provides the high
performance and high density of embedded gate arrays, enabling
designers to implement an entire system on a single device.
ACEX 1K devices are configured at system power-up with data stored in
an Altera serial configuration device or provided by a system controller.
Altera offers EPC16, EPC2, EPC1, and EPC1441 configuration devices,
which configure ACEX 1K devices via a serial data stream. Configuration
data can also be downloaded from system RAM or via the Altera
MasterBlaster
an ACEX 1K device has been configured, it can be reconfigured in-circuit
by resetting the device and loading new data. Because reconfiguration
requires less than 40 ms, real-time changes can be made during system
operation.
ACEX 1K devices contain an interface that permits microprocessors to
configure ACEX 1K devices serially or in parallel, and synchronously or
asynchronously. The interface also enables microprocessors to treat an
ACEX 1K device as memory and configure it by writing to a virtual
memory location, simplifying device reconfiguration.
shows ACEX 1K device performance for more complex designs.
TM
, ByteBlasterMV
ACEX 1K Programmable Logic Device Family Data Sheet
1,854
Used
LEs
597
342
TM
23.4
192
113
36
-1
, or BitBlaster
Speed Grade
28.7
156
Performance
92
28
-2
TM
TM
download cables. After
functions.
38.9
20.5
116
68
-3
MSPS
Units
MHz
MHz
s
5
13

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