EP2S90F1020C5 Altera, EP2S90F1020C5 Datasheet - Page 141

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EP2S90F1020C5

Manufacturer Part Number
EP2S90F1020C5
Description
IC STRATIX II FPGA 90K 1020-FBGA
Manufacturer
Altera
Series
Stratix® IIr
Datasheet

Specifications of EP2S90F1020C5

Number Of Logic Elements/cells
90960
Number Of Labs/clbs
4548
Total Ram Bits
4520488
Number Of I /o
758
Voltage - Supply
1.15 V ~ 1.25 V
Mounting Type
Surface Mount
Operating Temperature
0°C ~ 85°C
Package / Case
1020-FBGA
Family Name
Stratix II
Number Of Logic Blocks/elements
90960
# I/os (max)
758
Frequency (max)
609.76MHz
Process Technology
90nm (CMOS)
Operating Supply Voltage (typ)
1.2V
Logic Cells
90960
Ram Bits
4520488
Operating Supply Voltage (min)
1.15V
Operating Supply Voltage (max)
1.25V
Operating Temp Range
0C to 85C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
1020
Package Type
FC-FBGA
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Number Of Gates
-
Lead Free Status / Rohs Status
Not Compliant
Other names
544-1465
EP2S90F1020C5

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Altera Corporation
April 2011
Notes to
(1)
(2)
Notes to
(1)
(2)
Notes to
(1)
(2)
V
V
V
V
V
V
V
V
V
V
V
Table 5–5. LVTTL Specifications (Part 2 of 2)
Table 5–6. LVCMOS Specifications
Table 5–7. 2.5-V I/O Specifications
OL
CCIO
IH
IL
OH
OL
CCIO
IH
IL
OH
OL
Symbol
Symbol
Symbol
Stratix II devices comply to the narrow range for the supply voltage as specified in the EIA/JEDEC Standard,
JESD8-B.
This specification is supported across all the programmable drive strength settings available for this I/O standard
as shown in the Stratix II Architecture chapter in volume 1 of the Stratix II Device Handbook.
Stratix II devices comply to the narrow range for the supply voltage as specified in the EIA/JEDEC Standard,
JESD8-B.
This specification is supported across all the programmable drive strength available for this I/O standard as
shown in the Stratix II Architecture chapter in volume 1 of the Stratix II Device Handbook.
Stratix II devices V
EIA/JEDEC standard.
This specification is supported across all the programmable drive settings available for this I/O standard as shown
in the Stratix II Architecture chapter in volume 1 of the Stratix II Device Handbook.
(1)
(1)
Tables
Table
Table
Low-level output voltage
Output supply voltage
High-level input voltage
Low-level input voltage
High-level output voltage
Low-level output voltage
Output supply voltage
High-level input voltage
Low-level input voltage
High-level output voltage
Low-level output voltage
5–6:
5–7:
5–5:
C C I O
Parameter
Parameter
Parameter
voltage level support of 2.5 ± -5% is narrower than defined in the Normal Range of the
I
V
I
V
I
I
I
OL
OH
OL
OH
OL
CCIO
CCIO
= 4 mA
= 0.1 mA
= 1 mA
= –0.1 mA
= –1mA
= 3.0,
= 3.0,
Conditions
Conditions
Conditions
(2)
(2)
(2)
(2)
(2)
Stratix II Device Handbook, Volume 1
V
Minimum
Minimum
Minimum
CCIO
DC & Switching Characteristics
3.135
2.375
–0.3
–0.3
1.7
1.7
2.0
– 0.2
Maximum
Maximum
Maximum
3.465
2.625
0.45
4.0
0.8
0.2
4.0
0.7
0.4
Unit
Unit
Unit
V
V
V
V
V
V
V
V
V
V
V
5–5

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