EP2S90F1508I4 Altera, EP2S90F1508I4 Datasheet - Page 153

IC STRATIX II FPGA 90K 1508-FBGA

EP2S90F1508I4

Manufacturer Part Number
EP2S90F1508I4
Description
IC STRATIX II FPGA 90K 1508-FBGA
Manufacturer
Altera
Series
Stratix® IIr
Datasheet

Specifications of EP2S90F1508I4

Number Of Logic Elements/cells
90960
Number Of Labs/clbs
4548
Total Ram Bits
4520488
Number Of I /o
902
Voltage - Supply
1.15 V ~ 1.25 V
Mounting Type
Surface Mount
Operating Temperature
-40°C ~ 100°C
Package / Case
1508-FBGA
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Number Of Gates
-
Other names
544-1923
EP2S90F1508I4

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Altera Corporation
April 2011
Low
sustaining
current
High
sustaining
current
Low
overdrive
current
High
overdrive
current
Bus-hold
trip point
25-Ω R
3.3/2.5
Parameter Conditions
Table 5–29. Bus Hold Parameters
Table 5–30. Series On-Chip Termination Specification for Top & Bottom I/O Banks (Part 1 of 2)
Notes (1)
Symbol
S
,
2
Internal series termination with
calibration (25-Ω setting)
Internal series termination without
calibration (25-Ω setting)
V
(maximum)
V
(minimum)
0 V < V
V
0 V < V
V
IN
IN
CCIO
CCIO
> V
< V
IL
IH
IN
IN
<
<
Description
–22.5
22.5
0.45
Min
Bus Hold Specifications
Table 5–29
On-Chip Termination Specifications
Tables 5–30
resistance tolerance when using series or differential on-chip termination.
1.2 V
–120
Max
0.95
120
shows the Stratix II device family bus hold specifications.
and
–25.0
25.0
0.50
Min
1.5 V
V
V
5–31
C C I O
C C I O
–160
Max
1.00
160
Conditions
define the specification for internal termination
= 3.3/2.5 V
= 3.3/2.5 V
–30.0
V
30.0
0.68
Min
CCIO
1.8 V
Level
–200
Max
1.07
200
Stratix II Device Handbook, Volume 1
Commercial
–50.0
50.0
0.70
Min
Max
±30
±5
DC & Switching Characteristics
2.5 V
Resistance Tolerance
–300
Max
1.70
300
Industrial
–70.0
70.0
0.80
Min
Max
±10
±30
3.3 V
–500
Max
2.00
500
Unit
%
%
Unit
5–17
μA
μA
μA
μA
V

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