EP2S90F1508I4 Altera, EP2S90F1508I4 Datasheet - Page 217

IC STRATIX II FPGA 90K 1508-FBGA

EP2S90F1508I4

Manufacturer Part Number
EP2S90F1508I4
Description
IC STRATIX II FPGA 90K 1508-FBGA
Manufacturer
Altera
Series
Stratix® IIr
Datasheet

Specifications of EP2S90F1508I4

Number Of Logic Elements/cells
90960
Number Of Labs/clbs
4548
Total Ram Bits
4520488
Number Of I /o
902
Voltage - Supply
1.15 V ~ 1.25 V
Mounting Type
Surface Mount
Operating Temperature
-40°C ~ 100°C
Package / Case
1508-FBGA
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Number Of Gates
-
Other names
544-1923
EP2S90F1508I4

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Altera Corporation
April 2011
Therefore, the DCD percentage for the 267 MHz SSTL-2 Class II
non-DDIO row output clock on a –3 device ranges from 47.5% to 52.5%.
Notes to
(1)
(2)
Column I/O Output
3.3-V LVTTL
3.3-V LVCMOS
2.5 V
1.8 V
1.5-V LVCMOS
SSTL-2 Class I
SSTL-2 Class II
SSTL-18 Class I
SSTL-18 Class II
1.8-V HSTL
Class I
1.8-V HSTL
Class II
1.5-V HSTL
Class I
1.5-V HSTL
Class II
1.2-V HSTL
LVPECL
Table 5–81. Maximum DCD for Non-DDIO Output on Column I/O
Pins
Standard I/O
Standard
The DCD specification is based on a no logic array noise condition.
1.2-V HSTL is only supported in -3 devices.
Table
Note (1)
(2)
5–81:
Maximum DCD for Non-DDIO Output
-3 Devices
190
140
125
185
105
100
170
80
90
70
80
80
85
50
55
Stratix II Device Handbook, Volume 1
DC & Switching Characteristics
-4 & -5 Devices
220
175
155
110
215
135
130
115
100
110
110
115
80
80
-
Unit
ps
ps
ps
ps
ps
ps
ps
ps
ps
ps
ps
ps
ps
ps
ps
5–81

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