EP2S90F1508I4 Altera, EP2S90F1508I4 Datasheet - Page 53

IC STRATIX II FPGA 90K 1508-FBGA

EP2S90F1508I4

Manufacturer Part Number
EP2S90F1508I4
Description
IC STRATIX II FPGA 90K 1508-FBGA
Manufacturer
Altera
Series
Stratix® IIr
Datasheet

Specifications of EP2S90F1508I4

Number Of Logic Elements/cells
90960
Number Of Labs/clbs
4548
Total Ram Bits
4520488
Number Of I /o
902
Voltage - Supply
1.15 V ~ 1.25 V
Mounting Type
Surface Mount
Operating Temperature
-40°C ~ 100°C
Package / Case
1508-FBGA
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Number Of Gates
-
Other names
544-1923
EP2S90F1508I4

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Altera Corporation
May 2007
The DSP block is divided into four block units that interface with four
LAB rows on the left and right. Each block unit can be considered one
complete 18 × 18-bit multiplier with 36 inputs and 36 outputs. A local
interconnect region is associated with each DSP block. Like an LAB, this
interconnect region can be fed with 16 direct link interconnects from the
LAB to the left or right of the DSP block in the same row. R4 and C4
routing resources can access the DSP block's local interconnect region.
The outputs also work similarly to LAB outputs as well. Eighteen outputs
from the DSP block can drive to the left LAB through direct link
interconnects and eighteen can drive to the right LAB though direct link
interconnects. All 36 outputs can drive to R4 and C4 routing
interconnects. Outputs can drive right- or left-column routing.
Figures 2–29
Figure 2–29. DSP Block Interconnect Interface
Link Interconnects
R4, C4 & Direct
and
2–30
show the DSP block interfaces to LAB rows.
A2[17..0]
B2[17..0]
A3[17..0]
B3[17..0]
A4[17..0]
B4[17..0]
A1[17..0]
B1[17..0]
DSP Block
OG[17..0]
OC[17..0]
OD[17..0]
OH[17..0]
OA[17..0]
OB[17..0]
OE[17..0]
OF[17..0]
Stratix II Device Handbook, Volume 1
Stratix II Architecture
R4, C4 & Direct
Link Interconnects
2–45

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