XC2VP7-5FFG896I Xilinx Inc, XC2VP7-5FFG896I Datasheet - Page 128

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XC2VP7-5FFG896I

Manufacturer Part Number
XC2VP7-5FFG896I
Description
IC FPGA VIRTEX-II PRO 896-FBGA
Manufacturer
Xilinx Inc
Series
Virtex™-II Pror
Datasheet

Specifications of XC2VP7-5FFG896I

Number Of Logic Elements/cells
11088
Number Of Labs/clbs
1232
Total Ram Bits
811008
Number Of I /o
396
Voltage - Supply
1.425 V ~ 1.575 V
Mounting Type
Surface Mount
Operating Temperature
-40°C ~ 100°C
Package / Case
896-BBGA, FCBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of Gates
-
R
Virtex-II Pro and Virtex-II Pro X Platform FPGAs: DC and Switching Characteristics
Date
Version
09/15/05
4.4
10/10/05
4.5
03/05/07
4.6
No changes in Module 3 for this revision.
11/05/07
4.7
Updated copyright notice and legal disclaimer.
Notice of Disclaimer
THE XILINX HARDWARE FPGA AND CPLD DEVICES REFERRED TO HEREIN (“PRODUCTS”) ARE SUBJECT TO THE TERMS AND
CONDITIONS OF THE XILINX LIMITED WARRANTY WHICH CAN BE VIEWED AT http://www.xilinx.com/warranty.htm. THIS LIMITED
WARRANTY DOES NOT EXTEND TO ANY USE OF PRODUCTS IN AN APPLICATION OR ENVIRONMENT THAT IS NOT WITHIN THE
SPECIFICATIONS STATED IN THE XILINX DATA SHEET. ALL SPECIFICATIONS ARE SUBJECT TO CHANGE WITHOUT NOTICE.
PRODUCTS ARE NOT DESIGNED OR INTENDED TO BE FAIL-SAFE OR FOR USE IN ANY APPLICATION REQUIRING FAIL-SAFE
PERFORMANCE, SUCH AS LIFE-SUPPORT OR SAFETY DEVICES OR SYSTEMS, OR ANY OTHER APPLICATION THAT INVOKES
THE POTENTIAL RISKS OF DEATH, PERSONAL INJURY, OR PROPERTY OR ENVIRONMENTAL DAMAGE
APPLICATIONS”). USE OF PRODUCTS IN CRITICAL APPLICATIONS IS AT THE SOLE RISK OF CUSTOMER, SUBJECT TO
APPLICABLE LAWS AND REGULATIONS.
Virtex-II Pro Data Sheet
The Virtex-II Pro Data Sheet contains the following modules:
Virtex-II Pro and Virtex-II Pro X Platform FPGAs:
Introduction and Overview (Module 1)
Virtex-II Pro and Virtex-II Pro X Platform FPGAs:
Functional Description (Module 2)
DS083 (v4.7) November 5, 2007
Product Specification
Table
2: Added Footnote (7) to AVCCAUXRX for RocketIO X (1.8V for all
non-8B/10B-encoded data).
Table
3:
-
Power dissipation for 10.3125 Gb/s deleted.
-
Max I
and I
specifications added for Virtex-II Pro.
CCAUXTX
CCAUXRX
Table
11: Added specification for minimum p-p differential input voltage.
Table
22:
-
F
: Changed high end of range to 425 MHz.
GCLK
-
T
: Changed measurement units to picoseconds and added maximum
GJTT
specifications for two bit rate ranges.
-
T
: Changed measurement units to microseconds and adderd typical
LOCK
specification.
-
T
: Changed measurement units to microseconds and adderd typical and
PHASE
maximum specifications.
Table
24:
-
All parameters: Deleted specifications for 10.3125 Gb/s.
-
T
: Added typical specifications.
RJTOL
-
T
, T
, and T
: Added typical and maximum specifications.
JTOL
SJTOL
DDJTOL
Table
26: Restructured table. Total Jitter parameter added. All jitter parameters
respecified.
Table
28: Restructured table and added new specifications.
Changed XC2VPX70 variable baud rate specification to fixed-rate operation at
4.25 Gb/s.
Table
15: Removed -7 designations for XC2VPX20 and XC2VPX70 devices.
Virtex-II Pro and Virtex-II Pro X Platform FPGAs: DC
and Switching Characteristics (Module 3)
Virtex-II Pro and Virtex-II Pro X Platform FPGAs:
Pinout Information (Module 4)
www.xilinx.com
Revision
(“CRITICAL
Module 3 of 4
57

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