XC2VP7-5FFG896I Xilinx Inc, XC2VP7-5FFG896I Datasheet - Page 2

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XC2VP7-5FFG896I

Manufacturer Part Number
XC2VP7-5FFG896I
Description
IC FPGA VIRTEX-II PRO 896-FBGA
Manufacturer
Xilinx Inc
Series
Virtex™-II Pror
Datasheet

Specifications of XC2VP7-5FFG896I

Number Of Logic Elements/cells
11088
Number Of Labs/clbs
1232
Total Ram Bits
811008
Number Of I /o
396
Voltage - Supply
1.425 V ~ 1.575 V
Mounting Type
Surface Mount
Operating Temperature
-40°C ~ 100°C
Package / Case
896-BBGA, FCBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of Gates
-
R
DS083 (v4.7) November 5, 2007
Summary of Virtex-II Pro™ / Virtex-II Pro X Features
High-Performance Platform FPGA Solution, Including
-
Up to twenty RocketIO™ or RocketIO X embedded
Multi-Gigabit Transceivers (MGTs)
-
Up to two IBM PowerPC™ RISC processor blocks
Based on Virtex-II™ Platform FPGA Technology
-
Flexible logic resources
-
SRAM-based in-system configuration
-
Active Interconnect technology
Table 1: Virtex-II Pro / Virtex-II Pro X FPGA Family Members
RocketIO
PowerPC
Transceiver
Processor
(1)
Device
Blocks
Blocks
XC2VP2
4
0
XC2VP4
4
1
XC2VP7
8
1
XC2VP20
8
2
(4)
XC2VPX20
8
1
XC2VP30
8
2
(3)
XC2VP40
0
, 8, or 12
2
(3)
XC2VP50
0
or 16
2
XC2VP70
16 or 20
2
(4)
XC2VPX70
20
2
(3)
XC2VP100
0
or 20
2
Notes:
1.
-7 speed grade devices are not available in Industrial grade.
Logic Cell ≈ (1) 4-input LUT + (1)FF + Carry Logic
2.
3.
These devices can be ordered in a configuration without RocketIO transceivers. See
4.
Virtex-II Pro X devices equipped with RocketIO X transceiver cores.
RocketIO X Transceiver Features (XC2VPX20 and XC2VPX70 Only)
Variable-Speed Full-Duplex Transceiver (XC2VPX20)
Allowing 2.488 Gb/s to 6.25 Gb/s Baud Transfer Rates.
-
Includes specific baud rates used by various
standards, as listed in
Table 4, Module
Fixed-Speed Full-Duplex Tranceiver (XC2VPX70)
Operating at 4.25 Gb/s Baud Transfer Rate.
Eight or Twenty Transceiver Modules on an FPGA,
Depending upon Device
Monolithic Clock Synthesis and Clock Recovery
-
Eliminates the need for external components
© 2002–2007 Xilinx, Inc. All rights reserved. XILINX, the Xilinx logo, the Brand Window, and other designated brands included herein are trademarks of Xilinx, Inc. PowerPC is
a trademark of IBM Corp. and is used under license. All other trademarks are the property of their respective owners.
DS083 (v4.7) November 5, 2007
Product Specification
1
Virtex-II Pro and Virtex-II Pro X Platform FPGAs:
0
-
-
-
-
-
Virtex-II Pro / Virtex-II Pro X family members and resources
are shown in
CLB (1 = 4 slices =
max 128 bits)
Logic
Max Distr
(2)
Cells
Slices
RAM (Kb)
3,168
1,408
44
6,768
3,008
94
11,088
4,928
154
20,880
9,280
290
22,032
9,792
306
30,816
13,696
428
43,632
19,392
606
53,136
23,616
738
74,448
33,088
1,034
74,448
33,088
1,034
99,216
44,096
1,378
Automatic Lock-to-Reference Function
Programmable Serial Output Differential Swing
-
2.
-
Programmable Pre-emphasis Levels 0 to 500%
Telecom/Datacom Support Modes
-
-
www.xilinx.com
Introduction and Overview
Product Specification
SelectRAM™+ memory hierarchy
Dedicated 18-bit x 18-bit multiplier blocks
High-performance clock management circuitry
SelectI/O™-Ultra technology
XCITE Digitally Controlled Impedance (DCI) I/O
Table
1.
Block SelectRAM+
18 X 18 Bit
Multiplier
18 Kb
Max Block
Blocks
Blocks
RAM (Kb)
DCMs
12
12
216
28
28
504
44
44
792
88
88
1,584
88
88
1,584
136
136
2,448
192
192
3,456
232
232
4,176
328
328
5,904
308
308
5,544
444
444
7,992
12
Table 3
for package configurations.
200 mV to 1600 mV, peak-peak
Allows compatibility with other serial system
voltage levels
"x8" and "x10" clocking/data paths
64B/66B clocking support
Maximum
User
I/O Pads
4
204
4
348
4
396
8
564
8
552
8
644
8
804
8
852
8
996
8
992
1,164
Module 1 of 4
1

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