XC2VP7-5FFG896I Xilinx Inc, XC2VP7-5FFG896I Datasheet - Page 45

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XC2VP7-5FFG896I

Manufacturer Part Number
XC2VP7-5FFG896I
Description
IC FPGA VIRTEX-II PRO 896-FBGA
Manufacturer
Xilinx Inc
Series
Virtex™-II Pror
Datasheet

Specifications of XC2VP7-5FFG896I

Number Of Logic Elements/cells
11088
Number Of Labs/clbs
1232
Total Ram Bits
811008
Number Of I /o
396
Voltage - Supply
1.425 V ~ 1.575 V
Mounting Type
Surface Mount
Operating Temperature
-40°C ~ 100°C
Package / Case
896-BBGA, FCBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of Gates
-
Figure 30
LVDS_25_DCI and LVDSEXT_25_DCI I/O standards. For a
complete list, see the
Guide
On-Chip Differential Termination
Virtex-II Pro provides a true 100Ω differential termination
(DT) across the input differential receiver terminals. The
LVDS_25_DT,
ULVDS_25_DT standards support on-chip differential termi-
nation.
DS083 (v4.7) November 5, 2007
Product Specification
Recommended
Z 0
Conventional
Conventional
Transmit
DCI Receive
Reference
Resistor
.
Figure 30: LVDS DCI Usage Examples
provides examples illustrating the use of the
R
NOTE: Only LVDS25_DCI is supported (V
LVDS_25_DCI and LVDSEXT_25_DCI Receiver
LVDSEXT_25_DT,
Virtex-II Pro Platform FPGA User
VRN = VRP = R = Z 0
Z 0
Z 0
Z 0
Z 0
50 Ω
V
V
CCO
LDT_25_DT,
CCO
CCO
2R
2R
2R
2R
= 2.5V only)
2R
Virtex-II Pro and Virtex-II Pro X Platform FPGAs: Functional Description
Virtex-II Pro
LVDS DCI
DS083-2_65c_022103
Virtex-II Pro
LVDS
www.xilinx.com
and
The on-chip input differential termination in Virtex-II Pro
provides major advantages over the external resistor or the
DCI termination solution:
Figure 31
LVDS_25_DT,
ULVDS_25_DT I/O standards. For further details, refer to
Solution Record 17244
FPGA User Guide
Recommended
Z 0
Conventional
Conventional
Transmit,
On-Chip
Differential
Termination
Receive
Eliminates the stub at the receiver completely and
therefore greatly improve signal integrity
Consumes less power than DCI termination
Supports LDT (not supported by DCI termination)
Frees up VRP/VRN pins
Figure 31: LVDS Differential Termination Usage
provides examples illustrating the use of the
NOTE: Only 2.5V LVDS standards are supported (V
LVDSEXT_25_DT,
LDT_25_DT, and ULVDS_25_DT Receiver
for more design information.
LVDS_25_DT, LVDSEXT_25_DT,
. Also see the
Examples
Z 0
Z 0
Z 0
Z 0
50 Ω
Virtex-II Pro Platform
100Ω
LDT_25_DT,
2R
Virtex-II Pro
LVDS On-Chip
Differential
Termination
CCO
DS083-2_65e_052703
Module 2 of 4
Virtex-II Pro
LVDS
= 2.5V only)
and
34

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