XC2VP7-5FFG896I

Manufacturer Part NumberXC2VP7-5FFG896I
DescriptionIC FPGA VIRTEX-II PRO 896-FBGA
ManufacturerXilinx Inc
SeriesVirtex™-II Pro
XC2VP7-5FFG896I datasheet
 


Specifications of XC2VP7-5FFG896I

Number Of Logic Elements/cells11088Number Of Labs/clbs1232
Total Ram Bits811008Number Of I /o396
Voltage - Supply1.425 V ~ 1.575 VMounting TypeSurface Mount
Operating Temperature-40°C ~ 100°CPackage / Case896-BBGA, FCBGA
Lead Free Status / RoHS StatusLead free / RoHS CompliantNumber Of Gates-
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Virtex-II Pro and Virtex-II Pro X Platform FPGAs: DC and Switching Characteristics
Virtex-II Pro Switching Characteristics
Switching
characteristics
are
per-speed-grade basis and can be designated as Advance,
Preliminary, or Production. Note that
mance Characteristics
are subject to these guidelines, as
well. Each designation is defined as follows:
Advance: These speed files are based on simulations only
and are typically available soon after device design specifi-
cations are frozen. Although speed grades with this desig-
nation are considered relatively stable and conservative,
some under-reporting might still occur.
Preliminary: These speed files are based on complete ES
(engineering sample) silicon characterization. Devices and
speed grades with this designation are intended to give a
better indication of the expected performance of production
silicon. The probability of under-reporting delays is greatly
reduced as compared to Advance data.
Production: These speed files are released once enough
production silicon of a particular device family member has
been characterized to provide full correlation between
speed files and devices over numerous production lots.
There is no under-reporting of delays, and customers
receive formal notification of any subsequent changes. Typ-
ically, the slowest speed grades transition to Production
before faster speed grades.
Since individual family members are produced at different
times, the migration from one category to another depends
completely on the status of the fabrication process for each
device.
Table 15
correlates the current status of each
Virtex-II Pro device with a corresponding speed file desig-
nation.
PowerPC Switching Characteristics
Table 16: Processor Clocks Absolute AC Characteristics
Description
CPMC405CLOCK frequency
(2)
JTAGC405TCK frequency
(3)
PLBCLK
(3)
BRAMDSOCMCLK
(3)
BRAMISOCMCLK
Notes:
1. IMPORTANT! When CPMC405CLOCK runs at speeds greater than 350 MHz in -7 Commercial grade dual-processor devices, or
greater than 300 MHz in -6 Industrial grade dual-processor devices, users must implement the technology presented in XAPP755,
“PowerPC 405 Clock Macro for -7(C) and -6(I) Speed Grade Dual-Processor Devices.” Refer to
dual-processor devices.
2. The theoretical maximum frequency of this clock is one-half the CPMC405CLOCK. However, the achievable maximum is dependent
on the system, and will be much less.
3. The theoretical maximum frequency of these clocks is equal to the CPMC405CLOCK. However, the achievable maximum is
dependent on the system. Please see
DS083 (v4.7) November 5, 2007
Product Specification
specified
on
a
All specifications are always representative of worst-case
supply voltage and junction temperature conditions.
Virtex-II Pro Perfor-
Table 15: Virtex-II Pro Device Speed Grade Designations
Device
XC2VP2
XC2VP4
XC2VP7
XC2VP20
XC2VPX20
XC2VP30
XC2VP40
XC2VP50
XC2VP70
XC2VPX70
XC2VP100
Testing of Switching Characteristics
All devices are 100% functionally tested. Internal timing
parameters are derived from measuring internal test pat-
terns. Listed below are representative values. For more
specific, more precise, and worst-case guaranteed data,
use the values reported by the static timing analyzer (TRCE
in the Xilinx Development System) and back-annotate to the
simulation net list. Unless otherwise noted, values apply to
all Virtex-II Pro devices.
Speed Grade
-7
Min
Max
Min
(1)
0
400
0
0
200
0
0
400
0
0
400
0
0
400
0
PowerPC 405 Processor Block Reference Guide
www.xilinx.com
Speed Grade Designations
Advance
Preliminary
Production
-7, -6, -5
-7, -6, -5
-7, -6, -5
-7, -6, -5
-6, -5
-7, -6, -5
-7, -6, -5
-7, -6, -5
-7, -6, -5
-6, -5
-6
-5
Max
Min
Max
(1)
350
0
300
175
0
150
350
0
300
350
0
300
350
0
300
Table 1, Module 1
to identify
and
XAPP640
for more information.
Module 3 of 4
-6, -5
Units
MHz
MHz
MHz
MHz
MHz
11