XC2VP7-5FFG896I

Manufacturer Part NumberXC2VP7-5FFG896I
DescriptionIC FPGA VIRTEX-II PRO 896-FBGA
ManufacturerXilinx Inc
SeriesVirtex™-II Pro
XC2VP7-5FFG896I datasheet
 

Specifications of XC2VP7-5FFG896I

Number Of Logic Elements/cells11088Number Of Labs/clbs1232
Total Ram Bits811008Number Of I /o396
Voltage - Supply1.425 V ~ 1.575 VMounting TypeSurface Mount
Operating Temperature-40°C ~ 100°CPackage / Case896-BBGA, FCBGA
Lead Free Status / RoHS StatusLead free / RoHS CompliantNumber Of Gates-
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R
Virtex-II Pro and Virtex-II Pro X Platform FPGAs: DC and Switching Characteristics
Table 26: RocketIO X Transmitter Switching Characteristics
Description
Serial data rate
(3)
Serial data output total jitter (p-p)
Serial data output deterministic jitter (p-p)
(3,4)
Serial data output random jitter (p-p)
TX rise time
TX fall time
(5)
Transmit latency
TXUSRCLK duty cycle
TXUSRCLK2 duty cycle
Notes:
1.
The XC2VPX70 operates at a fixed 4.25 Gb/s baud rate.
2.
UI = Unit Interval
3.
Total Jitter T
= T
+ T
TJ
DJ
RJ
4.
T
specifications are wideband and include low-frequency jitter components (also referred to as wander).T
RJ
–12
BER=10
using the Bathtub Method.
5.
Transmit latency delay TXDATA to TXP/TXN. Refer to
DS083 (v4.7) November 5, 2007
Product Specification
(1)
BREFCLK
Symbol
Conditions
Frequency
F
GTX
2.488 Gb/s
3.125 Gb/s
T
TJ
4.25 Gb/s
6.25 Gb/s
2.488 Gb/s
155.52 MHz
3.125 Gb/s
156.25 MHz
(3)
T
DJ
4.25 Gb/s
212.5 MHz
6.25 Gb/s
312.5 MHz
2.488 Gb/s
155.52 MHz
3.125 Gb/s
156.25 MHz
T
RJ
4.25 Gb/s
212.5 MHz
6.25 Gb/s
312.5 MHz
T
20% – 80%
RTX
@ 2.500 Gb/s
T
FTX
T
TXLAT
T
TXDC
T
TX2DC
RocketIO X Transceiver User Guide
www.xilinx.com
Min
Typ
Max
2.488
6.25
0.15
0.20
0.14
0.19
0.39
0.48
0.42
0.54
0.03
0.17
0.03
0.17
0.14
0.26
0.17
0.35
0.12
0.18
0.12
0.20
0.25
0.39
0.25
0.39
60
60
14
19
45
50
55
45
50
55
specified is peak-to-peak, estimated at
RJ
for more information on calculating latency.
Module 3 of 4
Units
Gb/s
(2)
UI
UI
UI
UI
UI
UI
UI
UI
UI
UI
UI
UI
ps
ps
TXUSR
CLK
cycles
%
%
17

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